diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-07-25 21:04:58 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-25 21:04:58 +0000 |
| commit | e4616ace025fcf5316fffdf7f7007e3e5e2d7a05 (patch) | |
| tree | 91528f2f6e884ffe3de59d1d94a1f837488d79be | |
| parent | 0335a14ae771ce1793fb5401acfeb2fb59fc1c6f (diff) | |
Simply ARM so_reg MIOperandInfo definitions.
The shift immediate encoding, printing, etc. is handled directly by the
enclosing operand definition, so it should be a vanilla immediate, not a
nested complex operand (shift_imm).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135968 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 9edfcd76f8..53410579de 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -411,7 +411,7 @@ def so_reg_reg : Operand<i32>, // reg reg imm let EncoderMethod = "getSORegRegOpValue"; let PrintMethod = "printSORegRegOperand"; let ParserMatchClass = ShiftedRegAsmOperand; - let MIOperandInfo = (ops GPR, GPR, shift_imm); + let MIOperandInfo = (ops GPR, GPR, i32imm); } def ShiftedImmAsmOperand : AsmOperandClass { let Name = "RegShiftedImm"; } @@ -421,7 +421,7 @@ def so_reg_imm : Operand<i32>, // reg imm let EncoderMethod = "getSORegImmOpValue"; let PrintMethod = "printSORegImmOperand"; let ParserMatchClass = ShiftedImmAsmOperand; - let MIOperandInfo = (ops GPR, shift_imm); + let MIOperandInfo = (ops GPR, i32imm); } // FIXME: Does this need to be distinct from so_reg? @@ -430,7 +430,7 @@ def shift_so_reg_reg : Operand<i32>, // reg reg imm [shl,srl,sra,rotr]> { let EncoderMethod = "getSORegRegOpValue"; let PrintMethod = "printSORegRegOperand"; - let MIOperandInfo = (ops GPR, GPR, shift_imm); + let MIOperandInfo = (ops GPR, GPR, i32imm); } // FIXME: Does this need to be distinct from so_reg? @@ -439,7 +439,7 @@ def shift_so_reg_imm : Operand<i32>, // reg reg imm [shl,srl,sra,rotr]> { let EncoderMethod = "getSORegImmOpValue"; let PrintMethod = "printSORegImmOperand"; - let MIOperandInfo = (ops GPR, shift_imm); + let MIOperandInfo = (ops GPR, i32imm); } |