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| author | Jim Grosbach <grosbach@apple.com> | 2010-11-12 18:13:26 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-12 18:13:26 +0000 |
| commit | d75c3f136b2f7496d177b868956a4489d4b980b9 (patch) | |
| tree | b32b313360e836bbf74b50fa848fbb83352ef7f3 | |
| parent | 4252ffdef692d8be498474d75e820aafa8a4b9b4 (diff) | |
Fill in the default predication bits for ARM unconditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118907 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index b8948322c2..d2ac149928 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1381,6 +1381,7 @@ let isBranch = 1, isTerminator = 1 in { def B : ABXI<0b1010, (outs), (ins brtarget:$target), IIC_Br, "b\t$target", [(br bb:$target)]> { bits<24> target; + let Inst{31-28} = 0b1110; let Inst{23-0} = target; } |