diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-23 15:20:01 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-23 15:20:01 +0000 |
| commit | cc59ed53790abf2f1a00fe71893f60e26fc2d035 (patch) | |
| tree | 69dfa7bbcd4408fd0aa1d16afb96898167b48ba5 | |
| parent | 943814bb01682da176034c609556a12a07310961 (diff) | |
don't lie to the register allocator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20784 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index d25c36eb7f..abf9934f56 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -1068,7 +1068,7 @@ unsigned ISel::SelectExpr(SDOperand N) { unsigned Tmp9 = MakeReg(MVT::f64); BuildMI(BB, Alpha::STQ, 3).addReg(Tmp1).addFrameIndex(FrameIdxL).addReg(Alpha::F31); - BuildMI(BB, Alpha::STQ, 3).addReg(Tmp1).addFrameIndex(FrameIdxR).addReg(Alpha::F31); + BuildMI(BB, Alpha::STQ, 3).addReg(Tmp2).addFrameIndex(FrameIdxR).addReg(Alpha::F31); BuildMI(BB, Alpha::LDT, 2, Tmp4).addFrameIndex(FrameIdxL).addReg(Alpha::F31); BuildMI(BB, Alpha::LDT, 2, Tmp5).addFrameIndex(FrameIdxR).addReg(Alpha::F31); BuildMI(BB, Alpha::CVTQT, 1, Tmp6).addReg(Tmp4); @@ -1076,7 +1076,7 @@ unsigned ISel::SelectExpr(SDOperand N) { BuildMI(BB, Alpha::DIVT, 2, Tmp8).addReg(Tmp6).addReg(Tmp7); BuildMI(BB, Alpha::CVTTQ, 1, Tmp9).addReg(Tmp8); BuildMI(BB, Alpha::STT, 3).addReg(Tmp9).addFrameIndex(FrameIdxF).addReg(Alpha::F31); - BuildMI(BB, Alpha::LDQ, 3).addReg(Result).addFrameIndex(FrameIdxF).addReg(Alpha::F31); + BuildMI(BB, Alpha::LDQ, 2, Result).addFrameIndex(FrameIdxF).addReg(Alpha::F31); return Result; } |