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authorRichard Osborne <richard@xmos.com>2013-02-17 20:43:17 +0000
committerRichard Osborne <richard@xmos.com>2013-02-17 20:43:17 +0000
commitcbe6c88b6811e4641629d111f941879982362fe8 (patch)
tree2c0783e61f3be7ed18541ec2648ed500c41abcb2
parentd61932bf844134d886b57e6730a5ae0831ebd115 (diff)
[XCore] Add missing u6 / lu6 instructions.
These instructions are not targeted by the compiler but they are needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175403 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/XCore/XCoreInstrInfo.td20
-rw-r--r--test/MC/Disassembler/XCore/xcore.txt36
2 files changed, 54 insertions, 2 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td
index c23f87430f..12540621dd 100644
--- a/lib/Target/XCore/XCoreInstrInfo.td
+++ b/lib/Target/XCore/XCoreInstrInfo.td
@@ -603,6 +603,7 @@ defm BRBF: FRU6_LRU6_backwards_branch<0b011111, "bf">;
let Defs = [SP], Uses = [SP] in {
let neverHasSideEffects = 1 in
defm EXTSP : FU6_LU6_np<0b0111011110, "extsp">;
+
let mayStore = 1 in
defm ENTSP : FU6_LU6_np<0b0111011101, "entsp">;
@@ -611,8 +612,12 @@ defm RETSP : FU6_LU6<0b0111011111, "retsp", XCoreRetsp>;
}
}
-// TODO extdp, kentsp, krestsp, blat
-// getsr, kalli
+let neverHasSideEffects = 1 in
+defm EXTDP : FU6_LU6_np<0b0111001110, "extdp">;
+
+let Uses = [R11], isCall=1 in
+defm BLAT : FU6_LU6_np<0b0111001101, "blat">;
+
let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
def BRBU_u6 : _FU6<0b0111011100, (outs), (ins brtarget:$a), "bu -$a", []>;
@@ -632,6 +637,9 @@ let Defs = [R11], isReMaterializable = 1 in
def LDAWCP_lu6: _FLU6<0b0111111101, (outs), (ins MEMii:$a), "ldaw r11, cp[$a]",
[(set R11, ADDRcpii:$a)]>;
+let Defs = [R11] in
+defm GETSR : FU6_LU6_np<0b0111111100, "getsr r11,">;
+
defm SETSR : FU6_LU6_int<0b0111101101, "setsr", int_xcore_setsr>;
defm CLRSR : FU6_LU6_int<0b0111101100, "clrsr", int_xcore_clrsr>;
@@ -644,6 +652,14 @@ defm SETSR_branch : FU6_LU6_np<0b0111101101, "setsr">;
defm CLRSR_branch : FU6_LU6_np<0b0111101100, "clrsr">;
}
+defm KCALL : FU6_LU6_np<0b0111001111, "kcall">;
+
+let Uses = [SP], Defs = [SP], mayStore = 1 in
+defm KENTSP : FU6_LU6_np<0b0111101110, "kentsp">;
+
+let Uses = [SP], Defs = [SP], mayLoad = 1 in
+defm KRESTSP : FU6_LU6_np<0b0111101111, "krestsp">;
+
// U10
// TODO ldwcpl, blacp
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt
index f1ec31d932..bc798a80eb 100644
--- a/test/MC/Disassembler/XCore/xcore.txt
+++ b/test/MC/Disassembler/XCore/xcore.txt
@@ -539,6 +539,42 @@
# CHECK: setsr 21863
0x55 0xf1 0x67 0x7b
+# CHECK: extdp 4
+0x84 0x73
+
+# CHECK: extdp 554
+0x08 0xf0 0xaa 0x73
+
+# CHECK: blat 9
+0x49 0x73
+
+# CHECK: blat 61212
+0xbc 0xf3 0x5c 0x73
+
+# CHECK: getsr r11, 54
+0x36 0x7f
+
+# CHECK: getsr r11, 442
+0x06 0xf0 0x3a 0x7f
+
+# CHECK: kcall 11
+0xcb 0x73
+
+# CHECK: kcall 4001
+0x3e 0xf0 0xe1 0x73
+
+# CHECK: kentsp 22
+0x96 0x7b
+
+# CHECK: kentsp 8793
+0x89 0xf0 0x99 0x7b
+
+# CHECK: krestsp 0
+0xc0 0x7b
+
+# CHECK: krestsp 55312
+0x60 0xf3 0xd0 0x7b
+
# u10 / lu10 instructions
# CHECK: ldap r11, 40