diff options
author | Eric Christopher <echristo@apple.com> | 2010-10-15 23:07:10 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-10-15 23:07:10 +0000 |
commit | c9a91fdaf99a138e9d0aee648c7bc5d04ac385cd (patch) | |
tree | a7938b36bbd8287a752ec8b4695d90bf1de0edda | |
parent | 6549121c660dfd18361cd3daf6c766bee80d3097 (diff) |
Make sure offset is 0 for load/store register to the stack call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116640 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 901cb579fb..cbfad2dace 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -762,7 +762,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, assert((Base.Reg == ARM::SP || Offset == 0) && "Offset not zero and not a stack load!"); - if (Base.Reg == ARM::SP) + if (Base.Reg == ARM::SP && Offset == 0) TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, ResultReg, Base.FrameIndex, RC, TM.getRegisterInfo()); @@ -832,7 +832,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, break; } - if (Base.Reg == ARM::SP) + if (Base.Reg == ARM::SP && Offset == 0) TII.storeRegToStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, SrcReg, true /*isKill*/, Base.FrameIndex, TLI.getRegClassFor(VT), TM.getRegisterInfo()); |