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| author | Jim Grosbach <grosbach@apple.com> | 2009-05-12 22:30:18 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-05-12 22:30:18 +0000 |
| commit | c93f96187459b1f09b328e3cf6eade173909ce53 (patch) | |
| tree | 5bef3dc3338c7cf9d7d1c19b4c8b0211acfb5669 | |
| parent | b877a1f5458e26bb1020d4a07637d898559fc8a7 (diff) | |
correct register class for tADDspi to GPR since the register will always be SP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 914be0390b..ffb83a8b4d 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -307,7 +307,7 @@ def tADDrPCi : TI<(outs tGPR:$dst), (ins i32imm:$rhs), def tADDrSPi : TI<(outs tGPR:$dst), (ins GPR:$sp, i32imm:$rhs), "add $dst, $sp, $rhs * 4 @ addrspi", []>; -def tADDspi : TIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), +def tADDspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), "add $dst, $rhs * 4", []>; def tAND : TIt<(outs tGPR:$dst), (ins tGPR:$lhs, tGPR:$rhs), |