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authorJim Grosbach <grosbach@apple.com>2009-12-11 20:29:53 +0000
committerJim Grosbach <grosbach@apple.com>2009-12-11 20:29:53 +0000
commitc8f9e4fdc584c6bf48dc0f42083d05b707024b20 (patch)
tree82891b5dd1ae4752d8865d592268ee61853744f5
parent192db0027c2febbc4ebbd7947d38aba369c787f4 (diff)
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 406264b148..786dcfff05 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1574,7 +1574,7 @@ def MOVCCi : AI1<0b1101, (outs GPR:$dst),
//
// memory barriers protect the atomic sequences
-let isPredicable = 0 in {
+let isPredicable = 0, hasSideEffects = 1 in {
def Int_MemBarrierV7 : AI<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",