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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2009-10-30 14:33:14 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2009-10-30 14:33:14 +0000 |
| commit | c1382b745faa62bc6f2570a193bce6aee8d78885 (patch) | |
| tree | 736bab98db7f76ae3c6d2213f0c1165fd4f89a00 | |
| parent | bc2eb13d008f25a0ffc1bf2d60616f88bf477922 (diff) | |
This fixes functions like
void f (int a1, int a2, int a3, int a4, int a5,...)
In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85590 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-10-30.ll | 17 |
2 files changed, 18 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 773166a468..a76729c5f8 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1629,13 +1629,12 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); unsigned VARegSize = (4 - NumGPRs) * 4; unsigned VARegSaveSize = (VARegSize + Align - 1) & ~(Align - 1); - unsigned ArgOffset = 0; + unsigned ArgOffset = CCInfo.getNextStackOffset(); if (VARegSaveSize) { // If this function is vararg, store any remaining integer argument regs // to their spots on the stack so that they may be loaded by deferencing // the result of va_next. AFI->setVarArgsRegSaveSize(VARegSaveSize); - ArgOffset = CCInfo.getNextStackOffset(); VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset + VARegSaveSize - VARegSize); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); diff --git a/test/CodeGen/ARM/2009-10-30.ll b/test/CodeGen/ARM/2009-10-30.ll new file mode 100644 index 0000000000..82563869bd --- /dev/null +++ b/test/CodeGen/ARM/2009-10-30.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s +; This test checks that the address of the varg arguments is correctly +; computed when there are 5 or more regular arguments. + +define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) { +entry: +;CHECK: sub sp, sp, #4 +;CHECK: add r0, sp, #8 +;CHECK: str r0, [sp], #+4 +;CHECK: bx lr + %ap = alloca i8*, align 4 + %ap1 = bitcast i8** %ap to i8* + call void @llvm.va_start(i8* %ap1) + ret void +} + +declare void @llvm.va_start(i8*) nounwind |