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authorChris Lattner <sabre@nondot.org>2002-10-30 01:15:31 +0000
committerChris Lattner <sabre@nondot.org>2002-10-30 01:15:31 +0000
commitb752e9a2aee4165ab07f39a16bbc304e84451e01 (patch)
tree9b5bcbfbe84da35591554b1f261d957754a575ea
parent9d17740295838f94120646ef619b2e187f2d71bd (diff)
Set the destination register field based on the target specific flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp7
-rw-r--r--lib/Target/X86/X86InstrInfo.def4
2 files changed, 9 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 6d2bf1d496..c81ddb1900 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -12,8 +12,11 @@
// descriptors
//
static const MachineInstrDescriptor X86Insts[] = {
-#define I(ENUM, NAME, FLAGS, TSFLAGS) \
- { NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS },
+#define I(ENUM, NAME, FLAGS, TSFLAGS) \
+ { NAME, \
+ -1, /* Always vararg */ \
+ ((TSFLAGS) & X86II::Void) ? -1 : 0, /* Result is in 0 */ \
+ 0, false, 0, 0, TSFLAGS, FLAGS, TSFLAGS },
#include "X86InstrInfo.def"
};
diff --git a/lib/Target/X86/X86InstrInfo.def b/lib/Target/X86/X86InstrInfo.def
index bd4e47be4d..2388b9bf38 100644
--- a/lib/Target/X86/X86InstrInfo.def
+++ b/lib/Target/X86/X86InstrInfo.def
@@ -5,6 +5,10 @@
// specified below, and is used to make all of the information relevant to an
// instruction be in one place.
//
+// Note that X86 Instructions always have the destination register listed as
+// operand 0, unless it does not produce a value (in which case the TSFlags will
+// include X86II::Void).
+//
//===----------------------------------------------------------------------===//
// NOTE: No include guards desired