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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-05-26 10:56:17 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-05-26 10:56:17 +0000 |
| commit | a1334cdfb2afb44a1f2b952391e1b2fecb1d4bd8 (patch) | |
| tree | 11e3710eb439594a9fcd844524a649db2a13b11a | |
| parent | 138a24e4d4d6d9627ab7353a960a1d302fd04712 (diff) | |
On ARM, alignment is in bits
Add lr as a hard coded operand of bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMAsmPrinter.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 6 |
2 files changed, 7 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 0ef22be2e6..81932a51db 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -44,6 +44,7 @@ namespace { ZeroDirective = "\t.skip\t"; CommentString = "!"; ConstantPoolSection = "\t.section \".rodata\",#alloc\n"; + AlignmentIsInBytes = false; } /// We name each basic block in a Function with a unique number, so @@ -110,7 +111,7 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { assert(0 && "Not implemented"); break; } - EmitAlignment(4, F); + EmitAlignment(2, F); O << CurrentFnName << ":\n"; // Print out code for the function. diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index f706927533..4ccfa33faf 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -42,7 +42,11 @@ def ADJCALLSTACKDOWN : InstARM<(ops i32imm:$amt), "!ADJCALLSTACKDOWN $amt", [(callseq_start imm:$amt)]>; -def BX: InstARM<(ops), "bx", [(retflag)]>; +//bx supports other registers as operands. So this looks like a +//hack. Maybe a ret should be expanded to a "branch lr" and bx +//declared as a regular instruction + +def BX: InstARM<(ops), "bx lr", [(retflag)]>; def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr), "ldr $dst, [$addr]", |