diff options
| author | Chris Lattner <sabre@nondot.org> | 2003-12-01 05:18:30 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-12-01 05:18:30 +0000 |
| commit | 9b527704f75d1ae15b9c290090c8991171a13af1 (patch) | |
| tree | c5f5c3ac2917ce52b8864765cdcaefb779d382b9 | |
| parent | 4537076ee83be9cfd5598ced23acabf2185afb8b (diff) | |
Add an option to enable the SSA based peephole optimizer.
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10276 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86.h | 5 | ||||
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 12 |
2 files changed, 13 insertions, 4 deletions
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 5cf897fa71..c474d18ead 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -34,6 +34,11 @@ FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM); /// FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM); +/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86 +/// specific peephole optimizations. +/// +FunctionPass *createX86SSAPeepholeOptimizerPass(); + /// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole /// optimizations. /// diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 31eb4bd61c..eb4d19a778 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -29,6 +29,8 @@ namespace { cl::desc("Print generated machine code")); cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), cl::desc("Use the 'simple' X86 instruction selector")); + cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true), + cl::desc("Disable the ssa-based peephole optimizer (defaults to disabled)")); } // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine @@ -66,9 +68,9 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, else PM.add(createX86PatternInstructionSelector(*this)); - // TODO: optional optimizations go here - - // FIXME: Add SSA based peephole optimizer here. + // Run optional SSA-based machine code optimizations next... + if (!NoSSAPeephole) + PM.add(createX86SSAPeepholeOptimizerPass()); // Print the instruction selected machine code... if (PrintCode) @@ -117,7 +119,9 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) { else PM.add(createX86PatternInstructionSelector(*this)); - // TODO: optional optimizations go here + // Run optional SSA-based machine code optimizations next... + if (!NoSSAPeephole) + PM.add(createX86SSAPeepholeOptimizerPass()); // FIXME: Add SSA based peephole optimizer here. |