diff options
author | Bob Wilson <bob.wilson@apple.com> | 2011-08-05 07:24:09 +0000 |
---|---|---|
committer | Bob Wilson <bob.wilson@apple.com> | 2011-08-05 07:24:09 +0000 |
commit | 9a45008e917b8c1aef01ab717f0df254cdf1af44 (patch) | |
tree | 8d762147f2d7ebfe2275155db74b35e2f3bea8a1 | |
parent | 8d8fa2506d3480a10f8c2908880fb45abf0848c6 (diff) |
Add missing register constraint for some VLD3/VLD4 pseudo instructions.
<rdar://problem/9878189>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136962 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 0df62f4563..48071155c6 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -175,7 +175,8 @@ class VLDQQWBPseudo<InstrItinClass itin> (ins addrmode6:$addr, am6offset:$offset), itin, "$addr.addr = $wb">; class VLDQQQQPseudo<InstrItinClass itin> - : PseudoNLdSt<(outs QQQQPR:$dst), (ins addrmode6:$addr, QQQQPR:$src),itin,"">; + : PseudoNLdSt<(outs QQQQPR:$dst), (ins addrmode6:$addr, QQQQPR:$src),itin, + "$src = $dst">; class VLDQQQQWBPseudo<InstrItinClass itin> : PseudoNLdSt<(outs QQQQPR:$dst, GPR:$wb), (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), itin, |