diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-12-16 00:52:40 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-12-16 00:52:40 +0000 |
| commit | 966bf24491f7e53238fc4127bb9fcf43e6739586 (patch) | |
| tree | 3d8c62086ddcd62cac1b06b05919746f3e724748 | |
| parent | 1a8038636c2998e37f2130b0ab89a3686d9c1f48 (diff) | |
Expand fabs / fneg to and / xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32619 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 09ba005ea7..46ad8d788f 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -5055,9 +5055,6 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break; case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break; - case ISD::FNEG: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__negsf2" : "__negdf2"), Node, Hi); - break; case ISD::FADD: Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, Hi); break; @@ -5107,6 +5104,28 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ Lo = ExpandLibCall(FnName, Node, Hi); break; } + case ISD::FABS: { + SDOperand Mask = (VT == MVT::f64) + ? DAG.getConstantFP(BitsToDouble(~(1ULL << 63)), VT) + : DAG.getConstantFP(BitsToFloat(~(1U << 31)), VT); + Mask = DAG.getNode(ISD::BIT_CONVERT, NVT, Mask); + Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0)); + Lo = DAG.getNode(ISD::AND, NVT, Lo, Mask); + if (getTypeAction(NVT) == Expand) + ExpandOp(Lo, Lo, Hi); + break; + } + case ISD::FNEG: { + SDOperand Mask = (VT == MVT::f64) + ? DAG.getConstantFP(BitsToDouble(1ULL << 63), VT) + : DAG.getConstantFP(BitsToFloat(1U << 31), VT); + Mask = DAG.getNode(ISD::BIT_CONVERT, NVT, Mask); + Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node->getOperand(0)); + Lo = DAG.getNode(ISD::XOR, NVT, Lo, Mask); + if (getTypeAction(NVT) == Expand) + ExpandOp(Lo, Lo, Hi); + break; + } } // Make sure the resultant values have been legalized themselves, unless this |