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| author | Evan Cheng <evan.cheng@apple.com> | 2007-07-05 07:09:50 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-05 07:09:50 +0000 |
| commit | 7e36966de44a35f83e8dec22ed2f25b8c83736ed (patch) | |
| tree | 7eaf66a4ad2392f4d325c3348f14133488e19121 | |
| parent | 2aa133ef72a739c39b830cdc4d322a9d2e1d09c2 (diff) | |
PPC conditional branch predicate does not change after isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37893 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index bbddad2d0a..4ffde0a97f 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -272,7 +272,8 @@ def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits. // PowerPC Predicate operand. 20 = (0<<5)|20 = always, CR0 is a dummy reg // that doesn't matter. -def pred : PredicateOperand<OtherVT, (ops imm, CRRC), (ops (i32 20), CR0)> { +def pred : ImmutablePredicateOperand<OtherVT, (ops imm, CRRC), + (ops (i32 20), CR0)> { let PrintMethod = "printPredicateOperand"; } |