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authorJim Grosbach <grosbach@apple.com>2011-07-26 16:44:05 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-26 16:44:05 +0000
commit3d5ab367b663324dbe889f19ef9e39f3f0bcefcc (patch)
treea83e7f7fc0af28eb7cdf7175e674505bb09e62bb
parented8384806e56952c44f8a717c1ef54a8468d2c8d (diff)
ARM fix asm parsing range check for [0,31] immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136091 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index c7ed266ec9..fbea5a4aaf 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -494,7 +494,9 @@ def imm0_15 : Operand<i32>, ImmLeaf<i32, [{
def Imm0_31AsmOperand: AsmOperandClass { let Name = "Imm0_31"; }
def imm0_31 : Operand<i32>, ImmLeaf<i32, [{
return Imm >= 0 && Imm < 32;
-}]>;
+}]> {
+ let ParserMatchClass = Imm0_31AsmOperand;
+}
/// imm0_31_m1 - Matches and prints like imm0_31, but encodes as 'value - 1'.
def imm0_31_m1 : Operand<i32>, ImmLeaf<i32, [{