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authorMisha Brukman <brukman+llvm@gmail.com>2004-10-14 05:54:38 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2004-10-14 05:54:38 +0000
commit315d3341fd9386a55c9f9ca55e9e76ae3fecfb51 (patch)
tree7ab84099a7f5fe1a1d9e0c806554b7857f14f15f
parent99ee67ab193b5726332c04062f9d364da6ad6f8f (diff)
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPC32.td2
-rw-r--r--lib/Target/PowerPC/PPC64.td2
-rw-r--r--lib/Target/PowerPC/PowerPC.td2
3 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPC32.td b/lib/Target/PowerPC/PPC32.td
index bd6afd9dc8..fb115f4312 100644
--- a/lib/Target/PowerPC/PPC32.td
+++ b/lib/Target/PowerPC/PPC32.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+ let isLittleEndianEncoding = 1;
}
def PPC32 : Target {
diff --git a/lib/Target/PowerPC/PPC64.td b/lib/Target/PowerPC/PPC64.td
index 264a261f36..06067ed1f4 100644
--- a/lib/Target/PowerPC/PPC64.td
+++ b/lib/Target/PowerPC/PPC64.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+ let isLittleEndianEncoding = 1;
}
def PPC64 : Target {
diff --git a/lib/Target/PowerPC/PowerPC.td b/lib/Target/PowerPC/PowerPC.td
index f556aeeae7..b7d5bf116f 100644
--- a/lib/Target/PowerPC/PowerPC.td
+++ b/lib/Target/PowerPC/PowerPC.td
@@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+ let isLittleEndianEncoding = 1;
}
def PowerPC : Target {