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authorKalle Raiskila <kalle.raiskila@nokia.com>2010-10-07 16:32:42 +0000
committerKalle Raiskila <kalle.raiskila@nokia.com>2010-10-07 16:32:42 +0000
commit218c98c2848ef55607c729feb2c3d6d40ca504ae (patch)
tree7ab3d3c8f74131b19f3a1dafc53b00837ad43e45
parent8a52fa674b78ff0fdc04b1bf1124aa57c007f8ff (diff)
Add the missing cases to the type->registerclass conversion function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115921 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/CellSPU/SPUISelDAGToDAG.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index d389842b78..38a13d1874 100644
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -581,13 +581,27 @@ CurDAG->getMachineNode(COPY_TO_REGCLASS,..., ) function call
*/
SDValue SPUDAGToDAGISel::getRC( MVT VT ) {
switch( VT.SimpleTy ) {
+ case MVT::i8:
+ return CurDAG->getTargetConstant(SPU::R8CRegClass.getID(), MVT::i32);
+ break;
+ case MVT::i16:
+ return CurDAG->getTargetConstant(SPU::R16CRegClass.getID(), MVT::i32);
+ break;
case MVT::i32:
return CurDAG->getTargetConstant(SPU::R32CRegClass.getID(), MVT::i32);
break;
+ case MVT::f32:
+ return CurDAG->getTargetConstant(SPU::R32FPRegClass.getID(), MVT::i32);
+ break;
case MVT::i64:
return CurDAG->getTargetConstant(SPU::R64CRegClass.getID(), MVT::i32);
break;
+ case MVT::v16i8:
+ case MVT::v8i16:
+ case MVT::v4i32:
+ case MVT::v4f32:
case MVT::v2i64:
+ case MVT::v2f64:
return CurDAG->getTargetConstant(SPU::VECREGRegClass.getID(), MVT::i32);
break;
default: