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| author | Sean Callanan <scallanan@apple.com> | 2009-08-11 01:09:06 +0000 |
|---|---|---|
| committer | Sean Callanan <scallanan@apple.com> | 2009-08-11 01:09:06 +0000 |
| commit | 1c5cf1b3785c4e6dcd0b8549008861cb2c4e49ee (patch) | |
| tree | e06b5e0c176d7320e52b03f747e683fbc000c463 | |
| parent | f35290ce8d562eb80bc6e5f2b07c423f7e10a132 (diff) | |
Added the x86 INT instructions; both the special-case INT 3 and the general-case
INT i8. These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78630 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 36db7a18cf..903b3ff60a 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -518,6 +518,10 @@ let neverHasSideEffects = 1 in { "nopl\t$zero", []>, TB; } +// Trap +def INT3 : I<0xcc, RawFrm, (outs), (ins), "int 3", []>; +def INT : I<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap", []>; + // PIC base let neverHasSideEffects = 1, isNotDuplicable = 1, Uses = [ESP] in def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins piclabel:$label), |