diff options
| author | Kevin Enderby <enderby@apple.com> | 2010-05-25 18:16:58 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2010-05-25 18:16:58 +0000 |
| commit | 04ac770be90f7e6c308fb0213caab2bed2c20e47 (patch) | |
| tree | 58b4d3c6a7f53a856fe3c2a6745834e39c911f2e | |
| parent | 61734eb117063b4cd2a10c2403213cedd1347a06 (diff) | |
The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
for the 64-bit version of the Bit Test instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 3 | ||||
| -rw-r--r-- | test/MC/AsmParser/X86/x86_64-new-encoder.s | 5 |
2 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index a3750a9460..b7d3b4b9c8 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1313,7 +1313,8 @@ def BT64mr : RI<0xA3, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), def BT64ri8 : Ii8<0xBA, MRM4r, (outs), (ins GR64:$src1, i64i8imm:$src2), "bt{q}\t{$src2, $src1|$src1, $src2}", - [(set EFLAGS, (X86bt GR64:$src1, i64immSExt8:$src2))]>, TB; + [(set EFLAGS, (X86bt GR64:$src1, i64immSExt8:$src2))]>, TB, + REX_W; // Note that these instructions don't need FastBTMem because that // only applies when the other operand is in a register. When it's // an immediate, bt is still fast. diff --git a/test/MC/AsmParser/X86/x86_64-new-encoder.s b/test/MC/AsmParser/X86/x86_64-new-encoder.s index 6cd22d0305..6988110be2 100644 --- a/test/MC/AsmParser/X86/x86_64-new-encoder.s +++ b/test/MC/AsmParser/X86/x86_64-new-encoder.s @@ -126,3 +126,8 @@ movl 0, %eax // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,A,A,A,A] // CHECK: jne // CHECK: encoding: [0x75,A] jnz 0 + +// rdar://8017515 +btq $0x01,%rdx +// CHECK: btq $1, %rdx +// CHECK: encoding: [0x48,0x0f,0xba,0xe2,0x01] |