LLVM with the emscripten fastcomp javascript backend https://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/X86?h=1.13.0 2013-10-11T22:27:57Z 2013-10-11T22:27:57Z Jan Voung jvoung@chromium.org 2013-10-11T22:27:57Z urn:sha1:c036ceaa8225a23a795b50144b1da4b883e984a3 See: http://llvm.org/viewvc/llvm-project?view=revision&revision=187787 The newer version of newlib tickles this x86-32 bug when building the exception handling tests, which don't strip the "tail" attribute. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3702 Waiting on trybots, but it seems to have fixed the minimal reproducer I have: http://chromegw.corp.google.com/i/tryserver.nacl/builders/nacl-toolchain-linux-pnacl-x86_64/builds/922 http://chromegw.corp.google.com/i/tryserver.nacl/builders/nacl-toolchain-linux-pnacl-x86_32/builds/870 http://chromegw.corp.google.com/i/tryserver.nacl/builders/nacl-toolchain-mac-pnacl-x86_32/builds/875 R=jfb@chromium.org Review URL: https://codereview.chromium.org/26538008 2013-09-16T19:26:09Z Jim Stichnoth stichnot@chromium.org 2013-09-16T19:26:09Z urn:sha1:591359fae065fb5f86ba957a550503daef727536 GCC bug http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58416 causes the bf64-1.c test to fail in the GCC torture test suite. This provides an upstreamable workaround. Inspection of the LLVM code base showed no other instances of the pattern that triggers the gcc bug. This can also be upstreamed as soon as I can get a working x86-32 upstream build working to verify/test against. In the meantime, we can make one pnacl-fyi bot go green again. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3685 R=jfb@chromium.org, jfb@google.com Review URL: https://codereview.chromium.org/23437037 2013-07-25T16:24:02Z Jim Stichnoth stichnot@chromium.org 2013-07-25T16:24:02Z urn:sha1:6877ef9b4c4cfc6585bf1a77327e5637371c8658 BUG= https://code.google.com/p/nativeclient/issues/detail?id=3588 R=jvoung@chromium.org Review URL: https://codereview.chromium.org/19606003 2013-07-24T16:40:15Z Jim Stichnoth stichnot@chromium.org 2013-07-24T16:40:15Z urn:sha1:4499aac2b3679e7e0f69649b99f9b96c2c03dc4f Prevent sandbox addresses from being written to the stack. This covers the following cases: 1. Function calls manually push a masked return address and jump to the target, rather than using the call instruction. 2. When the function prolog chooses to use a frame pointer (rbp), it saves a masked version of the old rbp. 3. Indirect branches (jumps, calls, and returns) uniformly use r11 to construct the 64-bit target address. 4. Register r11 is marked as reserved (similar to r15) so that the register allocator won't inadvertently spill a code address to the stack. These transformations can be disabled for performance testing with the flag "-sfi-hide-sandbox-base=false". BUG= https://code.google.com/p/nativeclient/issues/detail?id=1235 R=eliben@chromium.org, mseaborn@chromium.org Review URL: https://codereview.chromium.org/19505003 2013-07-19T01:00:27Z Eli Bendersky eliben@chromium.org 2013-07-19T01:00:27Z urn:sha1:4412ea4b8e019d00dc7574fe1723eea0473a8ec1 2013-07-17T19:13:48Z Jim Stichnoth stichnot@chromium.org 2013-07-17T19:13:48Z urn:sha1:cc8deaf49f79eb22c4edc8c0f44ef64668b3be4a This applies only to %r15 sandboxed memory references. The problem is that if the index register is negative, the sandboxing operation will cause the index to become a large positive 32-bit value, which combined with the displacement, will overflow and try to reference memory outside the sandbox. This situation may legitimately occur if the compiler happens to construct a (constant) interior pointer to the middle of the global struct/array, and then dereferences it with a variable offset. After this fix, pnacl/scripts/testsuite_known_failures_pnacl.txt can be updated to remove the "aha x86-64" known failure. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3517 R=eliben@chromium.org Review URL: https://codereview.chromium.org/17987002 2013-07-15T23:09:15Z Eli Bendersky eliben@chromium.org 2013-07-15T23:09:15Z urn:sha1:c6cf05cb5108f356dde97c01ee4188b0671d4542 Conflicts: docs/LangRef.rst include/llvm/CodeGen/CallingConvLower.h include/llvm/IRReader/IRReader.h include/llvm/Target/TargetMachine.h lib/CodeGen/CallingConvLower.cpp lib/IRReader/IRReader.cpp lib/IRReader/LLVMBuild.txt lib/IRReader/Makefile lib/LLVMBuild.txt lib/Makefile lib/Support/MemoryBuffer.cpp lib/Support/Unix/PathV2.inc lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/Mips/CMakeLists.txt lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsInstrInfo.td lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrFormats.td lib/Transforms/IPO/ExtractGV.cpp lib/Transforms/InstCombine/InstCombineCompares.cpp lib/Transforms/Utils/SimplifyLibCalls.cpp test/CodeGen/X86/fast-isel-divrem.ll test/MC/ARM/data-in-code.ll tools/Makefile tools/llvm-extract/llvm-extract.cpp tools/llvm-link/CMakeLists.txt tools/opt/CMakeLists.txt tools/opt/LLVMBuild.txt tools/opt/Makefile tools/opt/opt.cpp 2013-06-24T16:18:55Z Mark Seaborn mseaborn@chromium.org 2013-06-24T16:18:55Z urn:sha1:41dd5ede22556305aed7ea2184a2905f187db78c This change will fix the regression in -O0 translation time caused by putting "align 1" on integer loads and stores, which was causing FastISel to fall back to SelectionDAG more often. > In X86FastISel::X86SelectStore(), improperly aligned stores are > rejected and handled by the DAG-based ISel. However, > X86FastISel::X86SelectLoad() makes no such requirement. There > doesn't appear to be an x86 architectural correctness issue with > allowing potentially unaligned store instructions. This patch > removes this restriction. > > Patch by Jim Stichnot. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3445 TEST=PNaCl toolchain trybots Review URL: https://codereview.chromium.org/17575003 2013-06-13T23:04:07Z Derek Schuff dschuff@chromium.org 2013-06-13T23:04:07Z urn:sha1:c31b941a4fc4c995cbc40d5f4be6705d61eda011 if the function calls _builtin_unwind_init() Also fix the list of callee-saved registers returned by X86RegisterInfo::getCalleeSavedRegisters BUG= https://code.google.com/p/nativeclient/issues/detail?id=3486 R=mseaborn@chromium.org Review URL: https://codereview.chromium.org/16987002 2013-05-22T17:23:54Z Bill Wendling isanbard@gmail.com 2013-05-22T17:23:54Z urn:sha1:62131ab28074e0ef5545775c248c2905d09e498c ------------------------------------------------------------------------ r182486 | d0k | 2013-05-22 10:01:12 -0700 (Wed, 22 May 2013) | 3 lines X86: When expanding PCMPGTQ to PCMPGTD we always want to compare the lower halves as unsigned. Take #2 on fixing PR15977. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182489 91177308-0d34-0410-b5e6-96231b3b80d8