emscripten-fastcomp/test/CodeGen/X86/tailcallstack64.ll, branch 1.13.2LLVM with the emscripten fastcomp javascript backendhttps://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/X86/tailcallstack64.ll?h=1.13.22012-02-01T23:20:51ZInstruction scheduling itinerary for Intel Atom.2012-02-01T23:20:51ZAndrew Trickatrick@apple.com2012-02-01T23:20:51Zurn:sha1:922d314e8f9f0d8e447c055485a2969ee9cf2dd2
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.
Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.
Adds a test to verify that the scheduler is working.
Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.
Patch by Preston Gurd!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
Fix some tests that depend on register allocation.2011-06-03T22:45:21ZJakob Stoklund Olesenstoklund@2pi.dk2011-06-03T22:45:21Zurn:sha1:2e3e720d76a57bf41605518169dfc95b326112e7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132602 91177308-0d34-0410-b5e6-96231b3b80d8
Fix register-dependent X86 tests.2011-04-05T00:32:44ZJakob Stoklund Olesenstoklund@2pi.dk2011-04-05T00:32:44Zurn:sha1:b0e47cdf3decc6aef46b1bdaf19342c39681623a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128867 91177308-0d34-0410-b5e6-96231b3b80d8
Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.2011-02-27T08:47:19ZNAKAMURA Takumigeek4civic@gmail.com2011-02-27T08:47:19Zurn:sha1:419f23278388a8999b5c0bbe73ce823f63747f28
It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126568 91177308-0d34-0410-b5e6-96231b3b80d8
Target/X86: Tweak win64's tailcall.2011-01-26T02:04:09ZNAKAMURA Takumigeek4civic@gmail.com2011-01-26T02:04:09Zurn:sha1:7754f85885f8a961cb403ef13ab39583492d2b1e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124272 91177308-0d34-0410-b5e6-96231b3b80d8
Fix whitespace.2011-01-26T02:03:37ZNAKAMURA Takumigeek4civic@gmail.com2011-01-26T02:03:37Zurn:sha1:e5fffe9c3fa402cb5d5167327783f82b86f52b8f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124270 91177308-0d34-0410-b5e6-96231b3b80d8
Teach two-address lowering how to unfold a load to open up commuting2010-06-21T22:17:20ZDan Gohmangohman@apple.com2010-06-21T22:17:20Zurn:sha1:584fedf188e863604f7b946a931c0f40cf9c944e
opportunities. For example, this lets it emit this:
movq (%rax), %rcx
addq %rdx, %rcx
instead of this:
movq %rdx, %rcx
addq (%rax), %rcx
in the case where %rdx has subsequent uses. It's the same number
of instructions, and usually the same encoding size on x86, but
it appears faster, and in general, it may allow better scheduling
for the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106493 91177308-0d34-0410-b5e6-96231b3b80d8
Don't enable the post-RA scheduler on x86 except at -O3. In its2009-12-07T19:04:31ZDan Gohmangohman@apple.com2009-12-07T19:04:31Zurn:sha1:d84ea47b896cbe6072a344118853ae22e937a04f
current form, it is too expensive in compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r87049, which was the workaround for the regression triggered2009-11-16T23:43:42ZDan Gohmangohman@apple.com2009-11-16T23:43:42Zurn:sha1:10190cceec5369cd49fc26df173b5902c44b0931
by the recent FixedStackPseudoSourceValue-related changes, now that
the specific bug that affected it is fixed, in r88954.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88997 91177308-0d34-0410-b5e6-96231b3b80d8
Update test.2009-11-13T01:01:58ZDaniel Dunbardaniel@zuster.org2009-11-13T01:01:58Zurn:sha1:6242495be25d0e1be1839aa76a3c78ec36604cfa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87049 91177308-0d34-0410-b5e6-96231b3b80d8