emscripten-fastcomp/test/CodeGen/X86/pic.ll, branch 1.13.2LLVM with the emscripten fastcomp javascript backendhttps://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/X86/pic.ll?h=1.13.22012-02-01T23:20:51ZInstruction scheduling itinerary for Intel Atom.2012-02-01T23:20:51ZAndrew Trickatrick@apple.com2012-02-01T23:20:51Zurn:sha1:922d314e8f9f0d8e447c055485a2969ee9cf2dd2
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.
Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.
Adds a test to verify that the scheduler is working.
Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.
Patch by Preston Gurd!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
Be careful about scheduling nodes above previous calls. It increase usages of2011-04-26T21:31:35ZEvan Chengevan.cheng@apple.com2011-04-26T21:31:35Zurn:sha1:554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3
more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on2010-09-22T05:49:14ZChris Lattnersabre@nondot.org2010-09-22T05:49:14Zurn:sha1:1eb1b68e3a5241591bfa18d4beb0e0cf13a48ef2
x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
Be more forgiving when calculating alias interference for physreg coalescing.2010-07-06T20:31:51ZJakob Stoklund Olesenstoklund@2pi.dk2010-07-06T20:31:51Zurn:sha1:9c2e7ca3513bf41ad4dd9ff807e0d2742f592722
It is OK for an alias live range to overlap if there is a copy to or from the
physical register. CoalescerPair can work out if the copy is coalescable
independently of the alias.
This means that we can join with the actual destination interval instead of
using the getOrigDstReg() hack. It is no longer necessary to merge clobber
ranges into subregisters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107695 91177308-0d34-0410-b5e6-96231b3b80d8
Teach two-address lowering how to unfold a load to open up commuting2010-06-21T22:17:20ZDan Gohmangohman@apple.com2010-06-21T22:17:20Zurn:sha1:584fedf188e863604f7b946a931c0f40cf9c944e
opportunities. For example, this lets it emit this:
movq (%rax), %rcx
addq %rdx, %rcx
instead of this:
movq %rdx, %rcx
addq (%rax), %rcx
in the case where %rdx has subsequent uses. It's the same number
of instructions, and usually the same encoding size on x86, but
it appears faster, and in general, it may allow better scheduling
for the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106493 91177308-0d34-0410-b5e6-96231b3b80d8
Start function numbering at 0.2010-04-17T16:29:15ZDan Gohmangohman@apple.com2010-04-17T16:29:15Zurn:sha1:9f23dee08c7052af2c4baae3e2b06518896742eb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
Allow trivial sibcall of vararg callee when no arguments are being passed.2010-03-26T02:13:13ZEvan Chengevan.cheng@apple.com2010-03-26T02:13:13Zurn:sha1:3c262eec5354766bab7b37efc8d203a7afe91458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99598 91177308-0d34-0410-b5e6-96231b3b80d8
simplify code to use OutContext.GetOrCreateTemporarySymbol with2010-03-12T18:47:50ZChris Lattnersabre@nondot.org2010-03-12T18:47:50Zurn:sha1:b0f129a5d9e07870b3cd69b3a61fb69554ae774d
no arguments instead of having to come up with a unique name.
This also makes the code less fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98364 91177308-0d34-0410-b5e6-96231b3b80d8
Perform trivial tail call optimization for callees with "C" ABI. These are done2010-01-27T06:25:16ZEvan Chengevan.cheng@apple.com2010-01-27T06:25:16Zurn:sha1:b17124553d569c6f09347f2cbe072eab445d30c4
even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94664 91177308-0d34-0410-b5e6-96231b3b80d8
Turn on post-alloc scheduling for x86.2009-10-18T19:57:27ZEvan Chengevan.cheng@apple.com2009-10-18T19:57:27Zurn:sha1:d36076e4a3a57f55c044cd1cf21a39abe1edf2de
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84431 91177308-0d34-0410-b5e6-96231b3b80d8