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<title>emscripten-fastcomp/test/CodeGen/X86/fp-stack-compare.ll, branch 1.13.2</title>
<subtitle>LLVM with the emscripten fastcomp javascript backend</subtitle>
<id>https://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/X86/fp-stack-compare.ll?h=1.13.2</id>
<link rel='self' href='https://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/X86/fp-stack-compare.ll?h=1.13.2'/>
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<updated>2012-04-27T12:07:43Z</updated>
<entry>
<title>X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures.</title>
<updated>2012-04-27T12:07:43Z</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2012-04-27T12:07:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=17c836c4b51a14f07a5d5442cf2e984474a8f57d'/>
<id>urn:sha1:17c836c4b51a14f07a5d5442cf2e984474a8f57d</id>
<content type='text'>
* Model FPSW (the FPU status word) as a register.
* Add ISel patterns for the FUCOM*, FNSTSW and SAHF instructions.
* During Legalize/Lowering, build a node sequence to transfer the comparison
result from FPSW into EFLAGS. If you're wondering about the right-shift: That's
an implicit sub-register extraction (%ax -&gt; %ah) which is handled later on by
the instruction selector.

Fixes PR6679. Patch by Christoph Erhardt!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155704 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Have the X86 back-end emit the alias instead of what's being aliased. In most</title>
<updated>2011-04-14T01:11:51Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2011-04-14T01:11:51Z</published>
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<id>urn:sha1:c6df9883da99915d1cfa491b381ffa703c61ed90</id>
<content type='text'>
cases, it's much nicer and more informative reading the alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>go to great lengths to work around a GAS bug my previous patch</title>
<updated>2010-11-06T21:37:06Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-11-06T21:37:06Z</published>
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<id>urn:sha1:db28788e4ae01c3fa8003773fc236768e87f6917</id>
<content type='text'>
exposed:

GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.

Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).

As such, switch the canonical form of this instruction to "pi" instead
of "ip".  This makes the code generator and disassembler generate pi,
avoiding the gas bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Eliminate more uses of llvm-as and llvm-dis.</title>
<updated>2009-09-08T23:54:48Z</updated>
<author>
<name>Dan Gohman</name>
<email>gohman@apple.com</email>
</author>
<published>2009-09-08T23:54:48Z</published>
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<id>urn:sha1:36a0947820fd4aa4b8a5fa26e3f079bdf572bc81</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Split the Add, Sub, and Mul instruction opcodes into separate</title>
<updated>2009-06-04T22:49:04Z</updated>
<author>
<name>Dan Gohman</name>
<email>gohman@apple.com</email>
</author>
<published>2009-06-04T22:49:04Z</published>
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<id>urn:sha1:ae3a0be92e33bc716722aa600983fc1535acb122</id>
<content type='text'>
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove llvm-upgrade and update tests.</title>
<updated>2008-02-21T07:42:26Z</updated>
<author>
<name>Tanya Lattner</name>
<email>tonic@nondot.org</email>
</author>
<published>2008-02-21T07:42:26Z</published>
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<id>urn:sha1:33eefffb2b25b5f4a313f08fa7c57ddfcbccf36e</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47432 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>For PR1319: Upgrade to new test harness.</title>
<updated>2007-04-15T22:20:47Z</updated>
<author>
<name>Reid Spencer</name>
<email>rspencer@reidspencer.com</email>
</author>
<published>2007-04-15T22:20:47Z</published>
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<id>urn:sha1:d3b1f6d3e0597baa77bf54cfe072c2fe974f56c1</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36091 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Use the llvm-upgrade program to upgrade llvm assembly.</title>
<updated>2006-12-02T04:23:10Z</updated>
<author>
<name>Reid Spencer</name>
<email>rspencer@reidspencer.com</email>
</author>
<published>2006-12-02T04:23:10Z</published>
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<id>urn:sha1:69ccadd7535a83b348595cf603126e6a68b2883b</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32115 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Testcase for pr1012</title>
<updated>2006-11-20T17:55:30Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2006-11-20T17:55:30Z</published>
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<id>urn:sha1:aa9c54909de85ac966a9b8b65ff53ee11c1f298c</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31875 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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