emscripten-fastcomp/test/CodeGen/PIC16, branch master LLVM with the emscripten fastcomp javascript backend https://git.amat.us/emscripten-fastcomp/atom/test/CodeGen/PIC16?h=master 2010-10-11T05:44:40Z Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if 2010-10-11T05:44:40Z Chris Lattner sabre@nondot.org 2010-10-11T05:44:40Z urn:sha1:60cb528246dd01b80b1b1260a2a877ea488e620a it comes back, it will be largely a rewrite, so keeping the old codebase in tree isn't helping anyone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116190 91177308-0d34-0410-b5e6-96231b3b80d8 Remove XFAIL for vg_leak as the leaks are fixed by 100601. 2010-04-07T07:06:48Z Sanjiv Gupta sanjiv.gupta@microchip.com 2010-04-07T07:06:48Z urn:sha1:06fd8fadc8d4586ecc2d870c73886f60188bb49d git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100612 91177308-0d34-0410-b5e6-96231b3b80d8 XFAIL some PIC16 tests when running under valgrind-leaks. I don't expect these 2010-03-30T14:34:13Z Benjamin Kramer benny.kra@googlemail.com 2010-03-30T14:34:13Z urn:sha1:32e6518de397d1c8a308d28990e1b062ec172ef8 to be fixed any time soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99888 91177308-0d34-0410-b5e6-96231b3b80d8 this testcase is failing because pic16 doesn't define a reg/reg 2010-03-02T20:48:24Z Chris Lattner sabre@nondot.org 2010-03-02T20:48:24Z urn:sha1:71b58d6c5eeecbeebbfedea642456570614fa6cf xor pattern. I have no plans to fix this XFAIL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97587 91177308-0d34-0410-b5e6-96231b3b80d8 xfail this for now. 2010-03-02T19:53:25Z Chris Lattner sabre@nondot.org 2010-03-02T19:53:25Z urn:sha1:1aa3e9269fb7f3631c8797457f2a562c2785e736 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97584 91177308-0d34-0410-b5e6-96231b3b80d8 Reapply things reverted back in 97220, with the fixed test case. 2010-02-26T17:59:28Z Sanjiv Gupta sanjiv.gupta@microchip.com 2010-02-26T17:59:28Z urn:sha1:2b0070211ee20771a82a7b9a3c085b2453aecdcb git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97228 91177308-0d34-0410-b5e6-96231b3b80d8 emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1, 2010-01-20T07:19:19Z Chris Lattner sabre@nondot.org 2010-01-20T07:19:19Z urn:sha1:043c4e5c1d012c8131c7f2fa27a4def32740c42f for tidiness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93992 91177308-0d34-0410-b5e6-96231b3b80d8 Extern declaration for unordered.f32 libcall was not being emitted. Fixed that. 2009-12-29T03:24:34Z Sanjiv Gupta sanjiv.gupta@microchip.com 2009-12-29T03:24:34Z urn:sha1:223497e1ef756176152ece14c3cac6213714425e git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8 Fixed llc crash for zext (i1 -> i8) loads. 2009-12-28T04:53:24Z Sanjiv Gupta sanjiv.gupta@microchip.com 2009-12-28T04:53:24Z urn:sha1:917283a4185ddb901776c7915359664ae92aef9d git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8 Reapply 91904. 2009-12-23T11:19:09Z Sanjiv Gupta sanjiv.gupta@microchip.com 2009-12-23T11:19:09Z urn:sha1:76d2f9a4dbcae8fee233787d49e9a586e18c3f60 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91996 91177308-0d34-0410-b5e6-96231b3b80d8