<feed xmlns='http://www.w3.org/2005/Atom'>
<title>emscripten-fastcomp/lib/Target/PowerPC/Makefile, branch master</title>
<subtitle>LLVM with the emscripten fastcomp javascript backend</subtitle>
<id>https://git.amat.us/emscripten-fastcomp/atom/lib/Target/PowerPC/Makefile?h=master</id>
<link rel='self' href='https://git.amat.us/emscripten-fastcomp/atom/lib/Target/PowerPC/Makefile?h=master'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/'/>
<updated>2013-05-03T19:49:39Z</updated>
<entry>
<title>[PowerPC] Add assembler parser</title>
<updated>2013-05-03T19:49:39Z</updated>
<author>
<name>Ulrich Weigand</name>
<email>ulrich.weigand@de.ibm.com</email>
</author>
<published>2013-05-03T19:49:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=5e220753ff81ac5cbee874e7c00c76c7fbe0d20a'/>
<id>urn:sha1:5e220753ff81ac5cbee874e7c00c76c7fbe0d20a</id>
<content type='text'>
This adds assembler parser support to the PowerPC back end.

The parser will run for any powerpc-*-* and powerpc64-*-* triples,
but was tested only on 64-bit Linux.  The supported syntax is
intended to be compatible with the GNU assembler.

The parser does not yet support all PowerPC instructions, but
it does support anything that is generated by LLVM itself.
There is no support for testing restricted instruction sets yet,
i.e. the parser will always accept any instructions it knows,
no matter what feature flags are given.

Instruction operands will be checked for validity and errors
generated.  (Error handling in general could still be improved.)

The patch adds a number of test cases to verify instruction
and operand encodings.  The tests currently cover all instructions
from the following PowerPC ISA v2.06 Book I facilities:
Branch, Fixed-point, Floating-Point, and Vector. 
Note that a number of these instructions are not yet supported
by the back end; they are marked with FIXME.

A number of follow-on check-ins will add extra features.  When
they are all included, LLVM passes all tests (including bootstrap)
when using clang -cc1as as the system assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Next round of MC refactoring. This patch factor MC table instantiations, MC</title>
<updated>2011-07-14T20:59:42Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2011-07-14T20:59:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=c60f9b752381baa6c4b80c0739034660f1748c84'/>
<id>urn:sha1:c60f9b752381baa6c4b80c0739034660f1748c84</id>
<content type='text'>
registeration and creation code into XXXMCDesc libraries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.</title>
<updated>2011-07-01T22:36:09Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2011-07-01T22:36:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=385e930d55f3ecd3c9538823dfa5896a12461845'/>
<id>urn:sha1:385e930d55f3ecd3c9538823dfa5896a12461845</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc</title>
<updated>2011-06-28T20:07:07Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2011-06-28T20:07:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=22fee2dff4c43b551aefa44a96ca74fcade6bfac'/>
<id>urn:sha1:22fee2dff4c43b551aefa44a96ca74fcade6bfac</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc</title>
<updated>2011-06-27T18:32:37Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2011-06-27T18:32:37Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42'/>
<id>urn:sha1:73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42</id>
<content type='text'>
into XXXGenRegisterInfo.inc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Starting to refactor Target to separate out code that's needed to fully describe</title>
<updated>2011-06-24T01:44:41Z</updated>
<author>
<name>Evan Cheng</name>
<email>evan.cheng@apple.com</email>
</author>
<published>2011-06-24T01:44:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d'/>
<id>urn:sha1:a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d</id>
<content type='text'>
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Implement a basic MCCodeEmitter for PPC.  This doesn't handle</title>
<updated>2010-11-15T04:16:32Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-11-15T04:16:32Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56'/>
<id>urn:sha1:5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56</id>
<content type='text'>
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:

	mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
	stw r0, 8(r1)                   ; encoding: [0x90,0x00,0x00,0x00]
	stwu r1, -64(r1)                ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
	lhz r4, 4(r3)                   ; encoding: [0xa0,0x00,0x00,0x00]
	cmplwi cr0, r4, 8               ; encoding: [0x28,0x00,0x00,0x00]
	beq cr0, LBB0_2                 ; encoding: [0x40,0x00,0x00,0x00]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>stub out a powerpc MCInstPrinter implementation.</title>
<updated>2010-11-14T19:40:38Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-11-14T19:40:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=60d5b5fdeec64b69c92db60242d3d90b3f978e69'/>
<id>urn:sha1:60d5b5fdeec64b69c92db60242d3d90b3f978e69</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>move PPCAsmPrinter into the main PPC library, like ARM and X86.</title>
<updated>2010-11-14T18:33:33Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-11-14T18:33:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=0094345184bc0a791f0811c8d7f5b6f9c8296e0f'/>
<id>urn:sha1:0094345184bc0a791f0811c8d7f5b6f9c8296e0f</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119054 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.</title>
<updated>2010-01-24T20:43:08Z</updated>
<author>
<name>Chris Lattner</name>
<email>sabre@nondot.org</email>
</author>
<published>2010-01-24T20:43:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/emscripten-fastcomp/commit/?id=43b5f9312d56be400af031f7487a99b75b7b0f97'/>
<id>urn:sha1:43b5f9312d56be400af031f7487a99b75b7b0f97</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94378 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
</feed>
