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<title>emscripten-fastcomp/lib/Target/Mips/Disassembler, branch master</title>
<subtitle>LLVM with the emscripten fastcomp javascript backend</subtitle>
<id>https://git.amat.us/emscripten-fastcomp/atom/lib/Target/Mips/Disassembler?h=master</id>
<link rel='self' href='https://git.amat.us/emscripten-fastcomp/atom/lib/Target/Mips/Disassembler?h=master'/>
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<updated>2013-04-18T00:52:44Z</updated>
<entry>
<title>[mips] DSP-ASE move from HI/LO register instructions.</title>
<updated>2013-04-18T00:52:44Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2013-04-18T00:52:44Z</published>
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<id>urn:sha1:26aef5b7d64e2dd2ed49123baf1e1075b648824f</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179739 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>[mips] Fix DSP instructions to have explicit accumulator register operands.</title>
<updated>2013-03-30T01:58:00Z</updated>
<author>
<name>Akira Hatanaka</name>
<email>ahatanaka@mips.com</email>
</author>
<published>2013-03-30T01:58:00Z</published>
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<id>urn:sha1:2c2c33a167c82db9abd9b6173c1cdfdaa40c2071</id>
<content type='text'>
Check that instruction selection can select multiply-add/sub DSP instructions
from a pattern that doesn't have intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178406 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove the form field from Mips16 instruction formats and set things</title>
<updated>2013-02-14T03:05:25Z</updated>
<author>
<name>Reed Kotler</name>
<email>rkotler@mips.com</email>
</author>
<published>2013-02-14T03:05:25Z</published>
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<id>urn:sha1:38f85c5b9f2e2a7e1364ce44b6b8cd1ec0ffb0b3</id>
<content type='text'>
up so that we can apply the direct object emitter patch. This patch
should be a nop right now and it's test is to not break what is already
there.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175126 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>This is a resubmittal. For some reason it broke the bots yesterday</title>
<updated>2013-01-19T02:00:40Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-01-19T02:00:40Z</published>
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<id>urn:sha1:e11dda8631f1e65417971ee0c2f7a661fc7d0fd7</id>
<content type='text'>
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Formatting fixes. Mostly long lines and 
blank spaces at end of lines.

Contributer: Jack Carter
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172882 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>This is a resubmittal. For some reason it broke the bots yesterday</title>
<updated>2013-01-17T00:28:20Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-01-17T00:28:20Z</published>
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<id>urn:sha1:c147b678206db510336ee95c3b55dc9c0ff19595</id>
<content type='text'>
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

The Mips RDHWR (Read Hardware Register) instruction was not 
tested for assembler or dissassembler consumption. This patch
adds that functionality.

Contributer: Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172685 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>reverting 172579</title>
<updated>2013-01-16T01:29:10Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-01-16T01:29:10Z</published>
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<id>urn:sha1:457ee1a12e2c52624af7fdb81cf938f6d8d96572</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172594 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Akira,</title>
<updated>2013-01-16T00:07:45Z</updated>
<author>
<name>Jack Carter</name>
<email>jcarter@mips.com</email>
</author>
<published>2013-01-16T00:07:45Z</published>
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<id>urn:sha1:490c7d97737ea7719efcea7321d3cfa3984b0027</id>
<content type='text'>
Hope you are feeling better.

The Mips RDHWR (Read Hardware Register) instruction was not 
tested for assembler or dissassembler consumption. This patch
adds that functionality.

Contributer: Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172579 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>MipsDisassembler.cpp: Prune DecodeHWRegs64RegisterClass() to suppress a warning. [-Wunused-function]</title>
<updated>2013-01-12T15:37:00Z</updated>
<author>
<name>NAKAMURA Takumi</name>
<email>geek4civic@gmail.com</email>
</author>
<published>2013-01-12T15:37:00Z</published>
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<id>urn:sha1:edaf85606d7ac8368dd7fa0e9fd4042e523a6e3a</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172319 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove edis - the enhanced disassembler. Fixes PR14654.</title>
<updated>2012-12-19T19:55:47Z</updated>
<author>
<name>Roman Divacky</name>
<email>rdivacky@freebsd.org</email>
</author>
<published>2012-12-19T19:55:47Z</published>
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<id>urn:sha1:759e3fa641d0ad01012d16d913015c9f69c8d2ab</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Use the new script to sort the includes of every file under lib.</title>
<updated>2012-12-03T16:50:05Z</updated>
<author>
<name>Chandler Carruth</name>
<email>chandlerc@gmail.com</email>
</author>
<published>2012-12-03T16:50:05Z</published>
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<id>urn:sha1:d04a8d4b33ff316ca4cf961e06c9e312eff8e64f</id>
<content type='text'>
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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