emscripten-fastcomp/lib/Target/ARM/MCTargetDesc, branch master LLVM with the emscripten fastcomp javascript backend https://git.amat.us/emscripten-fastcomp/atom/lib/Target/ARM/MCTargetDesc?h=master 2013-07-15T23:09:15Z Merge commit '7dfcb84fc16b3bf6b2379713b53090757f0a45f9' 2013-07-15T23:09:15Z Eli Bendersky eliben@chromium.org 2013-07-15T23:09:15Z urn:sha1:c6cf05cb5108f356dde97c01ee4188b0671d4542 Conflicts: docs/LangRef.rst include/llvm/CodeGen/CallingConvLower.h include/llvm/IRReader/IRReader.h include/llvm/Target/TargetMachine.h lib/CodeGen/CallingConvLower.cpp lib/IRReader/IRReader.cpp lib/IRReader/LLVMBuild.txt lib/IRReader/Makefile lib/LLVMBuild.txt lib/Makefile lib/Support/MemoryBuffer.cpp lib/Support/Unix/PathV2.inc lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/Mips/CMakeLists.txt lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsInstrInfo.td lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrFormats.td lib/Transforms/IPO/ExtractGV.cpp lib/Transforms/InstCombine/InstCombineCompares.cpp lib/Transforms/Utils/SimplifyLibCalls.cpp test/CodeGen/X86/fast-isel-divrem.ll test/MC/ARM/data-in-code.ll tools/Makefile tools/llvm-extract/llvm-extract.cpp tools/llvm-link/CMakeLists.txt tools/opt/CMakeLists.txt tools/opt/LLVMBuild.txt tools/opt/Makefile tools/opt/opt.cpp LLVM: Add ELF Note section to NaCl object files identifying them as such to gold 2013-05-10T23:00:11Z Derek Schuff dschuff@chromium.org 2013-05-10T23:00:11Z urn:sha1:52daf9d821c963f84dd312ff90921bfe1b1cc0a1 This is needed to switch the native linker to one based on upstream binutils 2.23 R=mseaborn@chromium.org BUG= https://code.google.com/p/nativeclient/issues/detail?id=2971 also related to bug https://code.google.com/p/nativeclient/issues/detail?id=3424 Review URL: https://codereview.chromium.org/15067009 Add support for subsections to the ELF assembler. Fixes PR8717. 2013-04-17T21:18:16Z Peter Collingbourne peter@pcc.me.uk 2013-04-17T21:18:16Z urn:sha1:df39be6cb4eb44011db3d3e86f8fe463f81ce127 Differential Revision: http://llvm-reviews.chandlerc.com/D598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179725 91177308-0d34-0410-b5e6-96231b3b80d8 Fix build failure introduced in 179591 when assertions are disabled. 2013-04-16T14:02:30Z Logan Chien tzuhsiang.chien@gmail.com 2013-04-16T14:02:30Z urn:sha1:a363b117f41700da0200753e6df62b5e2cb38378 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179593 91177308-0d34-0410-b5e6-96231b3b80d8 Implement ARM unwind opcode assembler. 2013-04-16T12:02:21Z Logan Chien tzuhsiang.chien@gmail.com 2013-04-16T12:02:21Z urn:sha1:532854d7ab47d4ec20fd8cec703aa8c89d4eefb2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179591 91177308-0d34-0410-b5e6-96231b3b80d8 Merge commit '279b9184c2ff4fea93b198a3519b8cb3a1d8d195' 2013-03-11T22:16:37Z Eli Bendersky eliben@chromium.org 2013-03-11T22:16:37Z urn:sha1:23c00401dad33ca247d2818e71540079bed63c5b Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/MC/MCAsmInfo.h lib/Linker/LinkArchives.cpp lib/Linker/LinkItems.cpp lib/MC/MCAsmInfo.cpp lib/MC/MCDwarf.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp lib/Target/Mips/MipsAsmPrinter.cpp lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/Mips/MipsTargetObjectFile.cpp lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Transforms/CMakeLists.txt lib/Transforms/LLVMBuild.txt lib/Transforms/Makefile test/MC/ARM/arm_instructions.s test/MC/X86/AlignedBundling/pad-align-to-bundle-end.s ARM: permit full range of valid ADR immediates. 2013-02-27T16:43:09Z Tim Northover Tim.Northover@arm.com 2013-02-27T16:43:09Z urn:sha1:d65dfd83421f4d26e6dc20476718d7d9b6ba3f3b This fixes an issue where trying to assemlbe valid ADR instructions would cause LLVM to hit a failed assertion. Patch by Keith Walker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176189 91177308-0d34-0410-b5e6-96231b3b80d8 Remove getBundleSize methods from NaCl Asm backends 2013-02-05T17:15:22Z Derek Schuff dschuff@chromium.org 2013-02-05T17:15:22Z urn:sha1:50bcd382991b721082fc0bfa6efa62488f23601a Remove the unnecessary hack and document the actually necessary one. 2013-02-04T22:56:34Z Derek Schuff dschuff@chromium.org 2013-02-04T22:56:34Z urn:sha1:dbbbf3eb9d821f4ad3caab162ab70627fb32e10c Cherry-pick not-yet-committed upstream change to fix relaxation at bundle end 2013-02-04T18:43:45Z Derek Schuff dschuff@chromium.org 2013-02-04T18:43:45Z urn:sha1:80abe0746cec97dd07ba74db157e85f6e83487a2