emscripten-fastcomp/include/llvm/CodeGen, branch master

Revert some ARM byval localmods since byval+varargs are not in stable pexes.

2013-08-30T23:42:36Z

Localmods came from: https://codereview.chromium.org/10825082/, and earlier. (1) The original change was so that byval parameters always go on the stack. That part was added because the original ARM code was buggy, and did not actually make a copy of the value, modifying the caller's struct (ouch!). (2) Then came a localmod to make all arguments following a byval go on the stack and to make the var-args code aware of that. This is so that arguments stay in the correct order for var-args to pick up. For (1) there has been some work upstream to make it work better. In any case, clang with --target=armv7a-...-gnueabi only used byval in some limited cases -- when the size of the struct is > 64 bytes where the backend will know that part of it could be in regs, and the rest can be memcpy'ed to the stack. For le32, clang will still generate byval without satisfying the same ARM condition (only for structs bigger than 64 bytes), so it could be *very bad* if we didn't have the ABI simpification passes rewrite the byval and try to let the ARM backend do things with byval... TEST=the GCC torture tests: va-arg-4.c, and 20030914-2.c and the example in issue 2746 still pass. BUG=none, cleanup R=dschuff@chromium.org Review URL: https://codereview.chromium.org/23691009

Merge commit '7dfcb84fc16b3bf6b2379713b53090757f0a45f9'

2013-07-15T23:09:15Z

Conflicts: docs/LangRef.rst include/llvm/CodeGen/CallingConvLower.h include/llvm/IRReader/IRReader.h include/llvm/Target/TargetMachine.h lib/CodeGen/CallingConvLower.cpp lib/IRReader/IRReader.cpp lib/IRReader/LLVMBuild.txt lib/IRReader/Makefile lib/LLVMBuild.txt lib/Makefile lib/Support/MemoryBuffer.cpp lib/Support/Unix/PathV2.inc lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/Mips/CMakeLists.txt lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsInstrInfo.td lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrFormats.td lib/Transforms/IPO/ExtractGV.cpp lib/Transforms/InstCombine/InstCombineCompares.cpp lib/Transforms/Utils/SimplifyLibCalls.cpp test/CodeGen/X86/fast-isel-divrem.ll test/MC/ARM/data-in-code.ll tools/Makefile tools/llvm-extract/llvm-extract.cpp tools/llvm-link/CMakeLists.txt tools/opt/CMakeLists.txt tools/opt/LLVMBuild.txt tools/opt/Makefile tools/opt/opt.cpp

Revert the IntrinsicLowering logic that preserves externals for intrinsics.

2013-06-28T20:25:56Z

This is no longer required, following our recent PNaCl ABI cleanups. BUG=None R=jvoung@chromium.org Review URL: https://codereview.chromium.org/18031017

For ARM backend, fixed "byval" attribute support.

2013-05-05T07:48:36Z

Now even the small structures could be passed within byval (small enough to be stored in GPRs). In regression tests next function prototypes are checked: PR15293: %artz = type { i32 } define void @foo(%artz* byval %s) define void @foo2(%artz* byval %s, i32 %p, %artz* byval %s2) foo: "s" stored in R0 foo2: "s" stored in R0, "s2" stored in R2. Next AAPCS rules are checked: 5.5 Parameters Passing, C.4 and C.5, "ParamSize" is parameter size in 32bit words: -- NSAA != 0, NCRN < R4 and NCRN+ParamSize > R4. Parameter should be sent to the stack; NCRN := R4. -- NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4. Parameter stored in GPRs; NCRN += ParamSize. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181148 91177308-0d34-0410-b5e6-96231b3b80d8

Add ArrayRef constructor from None, and do the cleanups that this constructor enables

2013-05-05T00:40:33Z

Patch by Robert Wilhelm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181138 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r180737. The companion patch was reverted, and this is not relevant right now.

2013-05-01T22:32:08Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180889 91177308-0d34-0410-b5e6-96231b3b80d8

Temporarily revert "Change the informal convention of DBG_VALUE so that we can express a"

2013-04-30T22:35:14Z

because it breaks some buildbots. This reverts commit 180816. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8

Change the informal convention of DBG_VALUE so that we can express a

2013-04-30T22:16:46Z

register-indirect address with an offset of 0. It used to be that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain registers use the combination reg, reg. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8

Emit the TLS initialization function pointers into the correct section.

2013-04-29T22:25:40Z

The `llvm.tls_init_funcs' (created by the front-end) holds pointers to the TLS initialization functions. These need to be placed into the correct section so that they are run before `main()'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180737 91177308-0d34-0410-b5e6-96231b3b80d8

Generalize the MachineTraceMetrics public API.

2013-04-27T03:54:20Z

Naturally, we should be able to pass in extra instructions, not just extra blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180667 91177308-0d34-0410-b5e6-96231b3b80d8