diff options
Diffstat (limited to 'test/Preprocessor/predefined-arch-macros.c')
| -rw-r--r-- | test/Preprocessor/predefined-arch-macros.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c index 691173f7bd..2361abe20c 100644 --- a/test/Preprocessor/predefined-arch-macros.c +++ b/test/Preprocessor/predefined-arch-macros.c @@ -420,6 +420,7 @@ // CHECK_COREI7_AVX_M32: #define __AVX__ 1 // CHECK_COREI7_AVX_M32: #define __MMX__ 1 // CHECK_COREI7_AVX_M32: #define __PCLMUL__ 1 +// CHECK_COREI7_AVX_M32-NOT: __RDRND__ // CHECK_COREI7_AVX_M32: #define __POPCNT__ 1 // CHECK_COREI7_AVX_M32: #define __SSE2__ 1 // CHECK_COREI7_AVX_M32: #define __SSE3__ 1 @@ -440,6 +441,7 @@ // CHECK_COREI7_AVX_M64: #define __AVX__ 1 // CHECK_COREI7_AVX_M64: #define __MMX__ 1 // CHECK_COREI7_AVX_M64: #define __PCLMUL__ 1 +// CHECK_COREI7_AVX_M64-NOT: __RDRND__ // CHECK_COREI7_AVX_M64: #define __POPCNT__ 1 // CHECK_COREI7_AVX_M64: #define __SSE2_MATH__ 1 // CHECK_COREI7_AVX_M64: #define __SSE2__ 1 @@ -464,6 +466,7 @@ // CHECK_CORE_AVX_I_M32: #define __AVX__ 1 // CHECK_CORE_AVX_I_M32: #define __MMX__ 1 // CHECK_CORE_AVX_I_M32: #define __PCLMUL__ 1 +// CHECK_CORE_AVX_I_M32: #define __RDRND__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE2__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE3__ 1 // CHECK_CORE_AVX_I_M32: #define __SSE4_1__ 1 @@ -483,6 +486,7 @@ // CHECK_CORE_AVX_I_M64: #define __AVX__ 1 // CHECK_CORE_AVX_I_M64: #define __MMX__ 1 // CHECK_CORE_AVX_I_M64: #define __PCLMUL__ 1 +// CHECK_CORE_AVX_I_M64: #define __RDRND__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE2__ 1 // CHECK_CORE_AVX_I_M64: #define __SSE3__ 1 @@ -511,6 +515,7 @@ // CHECK_CORE_AVX2_M32: #define __MMX__ 1 // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M32: #define __POPCNT__ 1 +// CHECK_CORE_AVX2_M32: #define __RDRND__ 1 // CHECK_CORE_AVX2_M32: #define __SSE2__ 1 // CHECK_CORE_AVX2_M32: #define __SSE3__ 1 // CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1 @@ -535,6 +540,7 @@ // CHECK_CORE_AVX2_M64: #define __MMX__ 1 // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M64: #define __POPCNT__ 1 +// CHECK_CORE_AVX2_M64: #define __RDRND__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2__ 1 // CHECK_CORE_AVX2_M64: #define __SSE3__ 1 |