diff options
| -rw-r--r-- | lib/CodeGen/CGBuiltin.cpp | 24 | ||||
| -rw-r--r-- | test/CodeGen/arm-vector-align.c | 10 |
2 files changed, 27 insertions, 7 deletions
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp index e463230b97..c4197e6870 100644 --- a/lib/CodeGen/CGBuiltin.cpp +++ b/lib/CodeGen/CGBuiltin.cpp @@ -1516,20 +1516,25 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Ty), Ops, "vld1"); case ARM::BI__builtin_neon_vld1_lane_v: - case ARM::BI__builtin_neon_vld1q_lane_v: + case ARM::BI__builtin_neon_vld1q_lane_v: { Ops[1] = Builder.CreateBitCast(Ops[1], Ty); Ty = llvm::PointerType::getUnqual(VTy->getElementType()); Ops[0] = Builder.CreateBitCast(Ops[0], Ty); - Ops[0] = Builder.CreateLoad(Ops[0]); - return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vld1_lane"); + LoadInst *Ld = Builder.CreateLoad(Ops[0]); + Value *Align = GetPointeeAlignment(*this, E->getArg(0)); + Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); + return Builder.CreateInsertElement(Ops[1], Ld, Ops[2], "vld1_lane"); + } case ARM::BI__builtin_neon_vld1_dup_v: case ARM::BI__builtin_neon_vld1q_dup_v: { Value *V = UndefValue::get(Ty); Ty = llvm::PointerType::getUnqual(VTy->getElementType()); Ops[0] = Builder.CreateBitCast(Ops[0], Ty); - Ops[0] = Builder.CreateLoad(Ops[0]); + LoadInst *Ld = Builder.CreateLoad(Ops[0]); + Value *Align = GetPointeeAlignment(*this, E->getArg(0)); + Ld->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); llvm::Constant *CI = ConstantInt::get(Int32Ty, 0); - Ops[0] = Builder.CreateInsertElement(V, Ops[0], CI); + Ops[0] = Builder.CreateInsertElement(V, Ld, CI); return EmitNeonSplat(Ops[0], CI); } case ARM::BI__builtin_neon_vld2_v: @@ -1877,11 +1882,16 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vst1, Ty), Ops, ""); case ARM::BI__builtin_neon_vst1_lane_v: - case ARM::BI__builtin_neon_vst1q_lane_v: + case ARM::BI__builtin_neon_vst1q_lane_v: { Ops[1] = Builder.CreateBitCast(Ops[1], Ty); Ops[1] = Builder.CreateExtractElement(Ops[1], Ops[2]); Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); - return Builder.CreateStore(Ops[1], Builder.CreateBitCast(Ops[0], Ty)); + StoreInst *St = Builder.CreateStore(Ops[1], + Builder.CreateBitCast(Ops[0], Ty)); + Value *Align = GetPointeeAlignment(*this, E->getArg(0)); + St->setAlignment(cast<ConstantInt>(Align)->getZExtValue()); + return St; + } case ARM::BI__builtin_neon_vst2_v: case ARM::BI__builtin_neon_vst2q_v: Ops.push_back(GetPointeeAlignment(*this, E->getArg(0))); diff --git a/test/CodeGen/arm-vector-align.c b/test/CodeGen/arm-vector-align.c index c1119cb5b7..b481a0c97f 100644 --- a/test/CodeGen/arm-vector-align.c +++ b/test/CodeGen/arm-vector-align.c @@ -12,8 +12,18 @@ // intrinsics. typedef float AlignedAddr __attribute__ ((aligned (16))); void t1(AlignedAddr *addr1, AlignedAddr *addr2) { +// CHECK: @t1 // CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16) float32x4_t a = vld1q_f32(addr1); // CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16) vst1q_f32(addr2, a); } + +// Radar 10538555: Make sure unaligned load/stores do not gain alignment. +void t2(char *addr) { +// CHECK: @t2 +// CHECK: load i32* %{{.*}}, align 1 + int32x2_t vec = vld1_dup_s32(addr); +// CHECK: store i32 %{{.*}}, i32* {{.*}}, align 1 + vst1_lane_s32(addr, vec, 1); +} |