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| author | Anna Zaks <ganna@apple.com> | 2013-02-25 19:51:03 +0000 |
|---|---|---|
| committer | Anna Zaks <ganna@apple.com> | 2013-02-25 19:51:03 +0000 |
| commit | c2833111020d7a672bb4b547799fcd87ea4f8fb5 (patch) | |
| tree | 698ce9b7b4cf73b4f52677e72a1593a05046f300 /test/CodeGen/mips-vector-arg.c | |
| parent | 42f2309f739549bead6e5a6c34fd1be4d087998f (diff) | |
Revert "Add more attributes from the command line to functions."
This reverts commit 176009.
The commit is a likely cause of several buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@176044 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/mips-vector-arg.c')
| -rw-r--r-- | test/CodeGen/mips-vector-arg.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/mips-vector-arg.c b/test/CodeGen/mips-vector-arg.c index 3202ebd630..9b2b35c8b7 100644 --- a/test/CodeGen/mips-vector-arg.c +++ b/test/CodeGen/mips-vector-arg.c @@ -8,26 +8,26 @@ typedef float v4sf __attribute__ ((__vector_size__ (16))); typedef int v4i32 __attribute__ ((__vector_size__ (16))); -// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW1:#[0-9]+]] +// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) #0 // O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW1:#[0-9]+]] +// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) #0 // N64: declare i32 @test_v4sf_2(i64, i64, i32, i64, i64, i64) extern test_v4sf_2(v4sf, int, v4sf); void test_v4sf(v4sf a1, int a2, v4sf a3) { test_v4sf_2(a3, a2, a1); } -// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW2:#[0-9]+]] +// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) #0 // O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW2:#[0-9]+]] +// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) #0 // N64: declare i32 @test_v4i32_2(i64, i64, i32, i64, i64, i64) extern test_v4i32_2(v4i32, int, v4i32); void test_v4i32(v4i32 a1, int a2, v4i32 a3) { test_v4i32_2(a3, a2, a1); } -// O32: attributes [[NUW1]] = { nounwind{{.*}} } -// O32: attributes [[NUW2]] = { nounwind{{.*}} } +// O32: attributes #0 = { nounwind "target-cpu"={{.*}} "target-features"={{.*}} } +// O32: attributes #1 = { "target-cpu"={{.*}} "target-features"={{.*}} } -// N64: attributes [[NUW1]] = { nounwind{{.*}} } -// N64: attributes [[NUW2]] = { nounwind{{.*}} } +// N64: attributes #0 = { nounwind "target-cpu"={{.*}} "target-features"={{.*}} } +// N64: attributes #1 = { "target-cpu"={{.*}} "target-features"={{.*}} } |