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authorDaniel Dunbar <daniel@zuster.org>2010-08-11 02:17:20 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-08-11 02:17:20 +0000
commitbf3d55243a58bc8ffc80c1fc581275677e348760 (patch)
tree89176e455bbcd851db523d93e65919b5af351d26 /lib/Basic/Targets.cpp
parent1fd71718eee5f39f560f536f0ee9cf7c68876518 (diff)
ARM: Recognize single precision float register names.
- We don't recognize double or NEON register names yet -- we don't have the infrastructure to generate the right clobbers for them. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@110775 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Basic/Targets.cpp')
-rw-r--r--lib/Basic/Targets.cpp12
1 files changed, 11 insertions, 1 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 3eee5c07d6..1e8ed79a0a 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1787,8 +1787,18 @@ public:
};
const char * const ARMTargetInfo::GCCRegNames[] = {
+ // Integer registers
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"
+ "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
+
+ // Float registers
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+ "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
+ "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
+ "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31"
+
+ // FIXME: Need double and NEON registers, but we need support for aliasing
+ // multiple registers for that.
};
void ARMTargetInfo::getGCCRegNames(const char * const *&Names,