diff options
| author | Jim Grosbach <grosbach@apple.com> | 2012-09-21 00:18:30 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-09-21 00:18:30 +0000 |
| commit | 4c919eb0c022be30d6130446cb8d50a7e8da9f46 (patch) | |
| tree | f61c02d91b075f8d0a71ac315b359aca58abced2 | |
| parent | 258f930227c1a102c9c22eee88df65f748863425 (diff) | |
ARM: Use a dedicated intrinsic for vector bitwise select.
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.
rdar://11011471
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@164342 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/clang/Basic/arm_neon.td | 4 | ||||
| -rw-r--r-- | lib/CodeGen/CGBuiltin.cpp | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td index 451d562923..360c7e2a63 100644 --- a/include/clang/Basic/arm_neon.td +++ b/include/clang/Basic/arm_neon.td @@ -379,8 +379,8 @@ def VORR : Inst<"vorr", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_OR>; def VEOR : Inst<"veor", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_XOR>; def VBIC : Inst<"vbic", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_ANDN>; def VORN : Inst<"vorn", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_ORN>; -def VBSL : Inst<"vbsl", "dudd", - "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPs", OP_SEL>; +def VBSL : SInst<"vbsl", "dudd", + "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPs">; //////////////////////////////////////////////////////////////////////////////// // E.3.30 Transposition operations diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp index 4ba52aa405..b5b6c145f8 100644 --- a/lib/CodeGen/CGBuiltin.cpp +++ b/lib/CodeGen/CGBuiltin.cpp @@ -1707,6 +1707,10 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, unsigned Int; switch (BuiltinID) { default: return 0; + case ARM::BI__builtin_neon_vbsl_v: + case ARM::BI__builtin_neon_vbslq_v: + return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vbsl, Ty), + Ops, "vbsl"); case ARM::BI__builtin_neon_vabd_v: case ARM::BI__builtin_neon_vabdq_v: Int = usgn ? Intrinsic::arm_neon_vabdu : Intrinsic::arm_neon_vabds; |