diff options
author | Anton Yartsev <anton.yartsev@gmail.com> | 2011-03-28 21:00:05 +0000 |
---|---|---|
committer | Anton Yartsev <anton.yartsev@gmail.com> | 2011-03-28 21:00:05 +0000 |
commit | 6305f721247f13707d9858b17d5696c1e3428a78 (patch) | |
tree | cfae6b59e33e8aac8b57bb8fbc5f2f16136ec781 | |
parent | b460210fe0dec08971edfe33c294323cf79cb894 (diff) |
refactoring
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@128427 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/CGExprScalar.cpp | 4 | ||||
-rw-r--r-- | lib/Sema/SemaExpr.cpp | 4 |
2 files changed, 2 insertions, 6 deletions
diff --git a/lib/CodeGen/CGExprScalar.cpp b/lib/CodeGen/CGExprScalar.cpp index c6a5a40d76..a28de703e5 100644 --- a/lib/CodeGen/CGExprScalar.cpp +++ b/lib/CodeGen/CGExprScalar.cpp @@ -2119,9 +2119,7 @@ Value *ScalarExprEmitter::EmitCompare(const BinaryOperator *E,unsigned UICmpOpc, // If AltiVec, the comparison results in a numeric type, so we use // intrinsics comparing vectors and giving 0 or 1 as a result - if (LHSTy->isVectorType() && - LHSTy->getAs<VectorType>()->getVectorKind() == - VectorType::AltiVecVector) { + if (LHSTy->isVectorType() && !E->getType()->isVectorType()) { // constants for mapping CR6 register bits to predicate result enum { CR6_EQ=0, CR6_EQ_REV, CR6_LT, CR6_LT_REV } CR6; diff --git a/lib/Sema/SemaExpr.cpp b/lib/Sema/SemaExpr.cpp index 214edf145c..945d35e8ce 100644 --- a/lib/Sema/SemaExpr.cpp +++ b/lib/Sema/SemaExpr.cpp @@ -7282,9 +7282,7 @@ QualType Sema::CheckVectorCompareOperands(Expr *&lex, Expr *&rex, // If AltiVec, the comparison results in a numeric type, i.e. // bool for C++, int for C - if (lType->getAs<VectorType>()->getVectorKind() == VectorType::AltiVecVector - && rType->getAs<VectorType>()->getVectorKind() == - VectorType::AltiVecVector) + if (vType->getAs<VectorType>()->getVectorKind() == VectorType::AltiVecVector) return Context.getLogicalOperationType(); // For non-floating point types, check for self-comparisons of the form |