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authorNate Begeman <natebegeman@mac.com>2010-05-28 23:15:59 +0000
committerNate Begeman <natebegeman@mac.com>2010-05-28 23:15:59 +0000
commitf88f63f346aed8f5fa1d1552c925d54eee65b7e4 (patch)
tree1656fa2ef605357b650d5fbaf7251bd77b3195af
parent2a480e356e45be74c3c3afe586b77cf923cd4181 (diff)
Implement remaining items in neon td file. Still need to modify emitter to generate a proper header.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@105058 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Headers/arm_neon.td24
1 files changed, 23 insertions, 1 deletions
diff --git a/lib/Headers/arm_neon.td b/lib/Headers/arm_neon.td
index c227acbdc9..29256a7065 100644
--- a/lib/Headers/arm_neon.td
+++ b/lib/Headers/arm_neon.td
@@ -172,9 +172,29 @@ def VSLI_N : Inst<"dddi", "csilUcUsUiUlPcPsQcQsQiQlQUcQUsQUiQUlQPcQPs">;
////////////////////////////////////////////////////////////////////////////////
// E.3.14 Loads and stores of a single vector
+def VLD1 : Inst<"d*cs", "QUcQUsQUiQUlQcQsQiQlQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VLD1_LANE : Inst<"d*csi", "QUcQUsQUiQUlQcQsQiQlQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VLD1_DUP : Inst<"d*cs", "QUcQUsQUiQUlQcQsQiQlQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VST1 : Inst<"v*sd", "QUcQUsQUiQUlQcQsQiQlQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VST1_LANE : Inst<"v*sdi", "QUcQUsQUiQUlQcQsQiQlQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
////////////////////////////////////////////////////////////////////////////////
// E.3.15 Loads and stores of an N-element structure
+def VLD2 : Inst<"2d*cs", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VLD3 : Inst<"3d*cs", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VLD4 : Inst<"4d*cs", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VLD2_DUP : Inst<"2d*cs", "UcUsUiUlcsilhfPcPs">;
+def VLD3_DUP : Inst<"3d*cs", "UcUsUiUlcsilhfPcPs">;
+def VLD4_DUP : Inst<"4d*cs", "UcUsUiUlcsilhfPcPs">;
+def VLD2_LANE : Inst<"2d*csi", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
+def VLD3_LANE : Inst<"3d*csi", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
+def VLD4_LANE : Inst<"4d*csi", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
+def VST2 : Inst<"v*s2d", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VST3 : Inst<"v*s3d", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VST4 : Inst<"v*s4d", "QUcQUsQUiQcQsQiQhQfQPcQPsUcUsUiUlcsilhfPcPs">;
+def VST2_LANE : Inst<"v*s2di", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
+def VST3_LANE : Inst<"v*s3di", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
+def VST4_LANE : Inst<"v*s4di", "QUsQUiQsQiQhQfQPsUcUsUicsihfPcPs">;
////////////////////////////////////////////////////////////////////////////////
// E.3.16 Extract lanes from a vector
@@ -280,7 +300,9 @@ def VBSL : Inst<"dxdd", "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPs">;
////////////////////////////////////////////////////////////////////////////////
// E.3.30 Transposition operations
-def VTRN: Inst<"", "">;
+def VTRN: Inst<"2ddd", "csiUcUsUifPcPsQcQsQiQUcQUsQUiQfQPcQPs">;
+def VZIP: Inst<"2ddd", "csUcUsfPcPsQcQsQiQUcQUsQUiQfQPcQPs">;
+def VUZP: Inst<"2ddd", "csiUcUsUifPcPsQcQsQiQUcQUsQUiQfQPcQPs">;
////////////////////////////////////////////////////////////////////////////////
// E.3.31 Vector reinterpret cast operations