diff options
author | Craig Topper <craig.topper@gmail.com> | 2012-08-06 07:07:06 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2012-08-06 07:07:06 +0000 |
commit | 427435fb15593f19f86aee0c25e2b96e03aadf69 (patch) | |
tree | c968a25b5d3edc37821c5a9d7874afa76a1bfde3 | |
parent | 04c3a25bd45ad8a6ad715783aee03df7284c5591 (diff) |
Re-enable pcmpistri/pcmpestri builtins in clang now that llvm supports them properly.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@161319 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/clang/Basic/BuiltinsX86.def | 21 | ||||
-rw-r--r-- | test/CodeGen/avx-builtins.c | 70 |
2 files changed, 80 insertions, 11 deletions
diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index 2730ab1b62..75e6074214 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -352,17 +352,16 @@ BUILTIN(__builtin_ia32_pcmpistri128, "iV16cV16cIc", "") BUILTIN(__builtin_ia32_pcmpestrm128, "V16cV16ciV16ciIc", "") BUILTIN(__builtin_ia32_pcmpestri128, "iV16ciV16ciIc","") -// FIXME: These builtins are horribly broken; reenable when PR11305 is fixed. -//BUILTIN(__builtin_ia32_pcmpistria128, "iV16cV16cIc","") -//BUILTIN(__builtin_ia32_pcmpistric128, "iV16cV16cIc","") -//BUILTIN(__builtin_ia32_pcmpistrio128, "iV16cV16cIc","") -//BUILTIN(__builtin_ia32_pcmpistris128, "iV16cV16cIc","") -//BUILTIN(__builtin_ia32_pcmpistriz128, "iV16cV16cIc","") -//BUILTIN(__builtin_ia32_pcmpestria128, "iV16ciV16ciIc","") -//BUILTIN(__builtin_ia32_pcmpestric128, "iV16ciV16ciIc","") -//BUILTIN(__builtin_ia32_pcmpestrio128, "iV16ciV16ciic","") -//BUILTIN(__builtin_ia32_pcmpestris128, "iV16ciV16ciIc","") -//BUILTIN(__builtin_ia32_pcmpestriz128, "iV16ciV16ciIc","") +BUILTIN(__builtin_ia32_pcmpistria128, "iV16cV16cIc","") +BUILTIN(__builtin_ia32_pcmpistric128, "iV16cV16cIc","") +BUILTIN(__builtin_ia32_pcmpistrio128, "iV16cV16cIc","") +BUILTIN(__builtin_ia32_pcmpistris128, "iV16cV16cIc","") +BUILTIN(__builtin_ia32_pcmpistriz128, "iV16cV16cIc","") +BUILTIN(__builtin_ia32_pcmpestria128, "iV16ciV16ciIc","") +BUILTIN(__builtin_ia32_pcmpestric128, "iV16ciV16ciIc","") +BUILTIN(__builtin_ia32_pcmpestrio128, "iV16ciV16ciIc","") +BUILTIN(__builtin_ia32_pcmpestris128, "iV16ciV16ciIc","") +BUILTIN(__builtin_ia32_pcmpestriz128, "iV16ciV16ciIc","") BUILTIN(__builtin_ia32_crc32qi, "UiUiUc", "") BUILTIN(__builtin_ia32_crc32hi, "UiUiUs", "") diff --git a/test/CodeGen/avx-builtins.c b/test/CodeGen/avx-builtins.c index b963c97cc1..0e5a741bcf 100644 --- a/test/CodeGen/avx-builtins.c +++ b/test/CodeGen/avx-builtins.c @@ -23,3 +23,73 @@ __m256i test__mm256_loadu_si256(void* p) { // CHECK: load <4 x i64>* %{{.+}}, align 1 return _mm256_loadu_si256(p); } + +__m128i test_mm_cmpestrm(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestrm128 + return _mm_cmpestrm(A, LA, B, LB, 7); +} + +int test_mm_cmpestri(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestri128 + return _mm_cmpestri(A, LA, B, LB, 7); +} + +int test_mm_cmpestra(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestria128 + return _mm_cmpestra(A, LA, B, LB, 7); +} + +int test_mm_cmpestrc(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestric128 + return _mm_cmpestrc(A, LA, B, LB, 7); +} + +int test_mm_cmpestro(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestrio128 + return _mm_cmpestro(A, LA, B, LB, 7); +} + +int test_mm_cmpestrs(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestris128 + return _mm_cmpestrs(A, LA, B, LB, 7); +} + +int test_mm_cmpestrz(__m128i A, int LA, __m128i B, int LB) { + // CHECK: @llvm.x86.sse42.pcmpestriz128 + return _mm_cmpestrz(A, LA, B, LB, 7); +} + +__m128i test_mm_cmpistrm(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistrm128 + return _mm_cmpistrm(A, B, 7); +} + +int test_mm_cmpistri(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistri128 + return _mm_cmpistri(A, B, 7); +} + +int test_mm_cmpistra(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistria128 + return _mm_cmpistra(A, B, 7); +} + +int test_mm_cmpistrc(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistric128 + return _mm_cmpistrc(A, B, 7); +} + +int test_mm_cmpistro(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistrio128 + return _mm_cmpistro(A, B, 7); +} + +int test_mm_cmpistrs(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistris128 + return _mm_cmpistrs(A, B, 7); +} + +int test_mm_cmpistrz(__m128i A, __m128i B) { + // CHECK: @llvm.x86.sse42.pcmpistriz128 + return _mm_cmpistrz(A, B, 7); +} |