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authorBenjamin Kramer <benny.kra@googlemail.com>2012-06-28 20:08:55 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2012-06-28 20:08:55 +0000
commit1d2b2ca97686b1ed16b1614e4700f9d2a0938a71 (patch)
tree7353fdbb8457e7977835196ebcc341c0c46e99a8
parent712692e130af20b1759b1cf1aae83e22d585233f (diff)
Dead code eliminate the massive hexagon builtin intrinsic supporting code.
The tablegen'd code does the same thing without this egregious duplication. In my limited testing everything seems to work, however there can be differences if the clang and llvm builtin definitions don't match. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159371 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/CGBuiltin.cpp2584
-rw-r--r--lib/CodeGen/CodeGenFunction.h2
2 files changed, 0 insertions, 2586 deletions
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index a3d4af72da..f3d6121b9e 100644
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -1378,8 +1378,6 @@ Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID,
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
return EmitPPCBuiltinExpr(BuiltinID, E);
- case llvm::Triple::hexagon:
- return EmitHexagonBuiltinExpr(BuiltinID, E);
default:
return 0;
}
@@ -2453,2588 +2451,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
}
-Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
- const CallExpr *E) {
- llvm::SmallVector<Value*, 4> Ops;
-
- for (unsigned i = 0, e = E->getNumArgs(); i != e; i++)
- Ops.push_back(EmitScalarExpr(E->getArg(i)));
-
- Intrinsic::ID ID = Intrinsic::not_intrinsic;
-
- switch (BuiltinID) {
- default: return 0;
-
-// The builtins below are not autogenerated from iset.py.
-// Make sure you do not overwrite these.
-
- case Hexagon::BI__builtin_SI_to_SXTHI_asrh:
- ID = Intrinsic::hexagon_SI_to_SXTHI_asrh; break;
-
- case Hexagon::BI__builtin_circ_ldd:
- ID = Intrinsic::hexagon_circ_ldd; break;
-
-// The builtins above are not autogenerated from iset.py.
-// Make sure you do not overwrite these.
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpeq:
- ID = Intrinsic::hexagon_C2_cmpeq; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgt:
- ID = Intrinsic::hexagon_C2_cmpgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgtu:
- ID = Intrinsic::hexagon_C2_cmpgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpeqp:
- ID = Intrinsic::hexagon_C2_cmpeqp; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgtp:
- ID = Intrinsic::hexagon_C2_cmpgtp; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgtup:
- ID = Intrinsic::hexagon_C2_cmpgtup; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_rcmpeqi:
- ID = Intrinsic::hexagon_A4_rcmpeqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_rcmpneqi:
- ID = Intrinsic::hexagon_A4_rcmpneqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_rcmpeq:
- ID = Intrinsic::hexagon_A4_rcmpeq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_rcmpneq:
- ID = Intrinsic::hexagon_A4_rcmpneq; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_bitsset:
- ID = Intrinsic::hexagon_C2_bitsset; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_bitsclr:
- ID = Intrinsic::hexagon_C2_bitsclr; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_nbitsset:
- ID = Intrinsic::hexagon_C4_nbitsset; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_nbitsclr:
- ID = Intrinsic::hexagon_C4_nbitsclr; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpeqi:
- ID = Intrinsic::hexagon_C2_cmpeqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgti:
- ID = Intrinsic::hexagon_C2_cmpgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgtui:
- ID = Intrinsic::hexagon_C2_cmpgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgei:
- ID = Intrinsic::hexagon_C2_cmpgei; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpgeui:
- ID = Intrinsic::hexagon_C2_cmpgeui; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmplt:
- ID = Intrinsic::hexagon_C2_cmplt; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_cmpltu:
- ID = Intrinsic::hexagon_C2_cmpltu; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_bitsclri:
- ID = Intrinsic::hexagon_C2_bitsclri; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_nbitsclri:
- ID = Intrinsic::hexagon_C4_nbitsclri; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmpneqi:
- ID = Intrinsic::hexagon_C4_cmpneqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmpltei:
- ID = Intrinsic::hexagon_C4_cmpltei; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmplteui:
- ID = Intrinsic::hexagon_C4_cmplteui; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmpneq:
- ID = Intrinsic::hexagon_C4_cmpneq; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmplte:
- ID = Intrinsic::hexagon_C4_cmplte; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_cmplteu:
- ID = Intrinsic::hexagon_C4_cmplteu; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_and:
- ID = Intrinsic::hexagon_C2_and; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_or:
- ID = Intrinsic::hexagon_C2_or; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_xor:
- ID = Intrinsic::hexagon_C2_xor; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_andn:
- ID = Intrinsic::hexagon_C2_andn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_not:
- ID = Intrinsic::hexagon_C2_not; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_orn:
- ID = Intrinsic::hexagon_C2_orn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_and_and:
- ID = Intrinsic::hexagon_C4_and_and; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_and_or:
- ID = Intrinsic::hexagon_C4_and_or; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_or_and:
- ID = Intrinsic::hexagon_C4_or_and; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_or_or:
- ID = Intrinsic::hexagon_C4_or_or; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_and_andn:
- ID = Intrinsic::hexagon_C4_and_andn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_and_orn:
- ID = Intrinsic::hexagon_C4_and_orn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_or_andn:
- ID = Intrinsic::hexagon_C4_or_andn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_or_orn:
- ID = Intrinsic::hexagon_C4_or_orn; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_pxfer_map:
- ID = Intrinsic::hexagon_C2_pxfer_map; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_any8:
- ID = Intrinsic::hexagon_C2_any8; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_all8:
- ID = Intrinsic::hexagon_C2_all8; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_vitpack:
- ID = Intrinsic::hexagon_C2_vitpack; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_mux:
- ID = Intrinsic::hexagon_C2_mux; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_muxii:
- ID = Intrinsic::hexagon_C2_muxii; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_muxir:
- ID = Intrinsic::hexagon_C2_muxir; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_muxri:
- ID = Intrinsic::hexagon_C2_muxri; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_vmux:
- ID = Intrinsic::hexagon_C2_vmux; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_mask:
- ID = Intrinsic::hexagon_C2_mask; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpbeq:
- ID = Intrinsic::hexagon_A2_vcmpbeq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpbeqi:
- ID = Intrinsic::hexagon_A4_vcmpbeqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpbeq_any:
- ID = Intrinsic::hexagon_A4_vcmpbeq_any; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpbgtu:
- ID = Intrinsic::hexagon_A2_vcmpbgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgtui:
- ID = Intrinsic::hexagon_A4_vcmpbgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgt:
- ID = Intrinsic::hexagon_A4_vcmpbgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgti:
- ID = Intrinsic::hexagon_A4_vcmpbgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbeq:
- ID = Intrinsic::hexagon_A4_cmpbeq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbeqi:
- ID = Intrinsic::hexagon_A4_cmpbeqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbgtu:
- ID = Intrinsic::hexagon_A4_cmpbgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbgtui:
- ID = Intrinsic::hexagon_A4_cmpbgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbgt:
- ID = Intrinsic::hexagon_A4_cmpbgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpbgti:
- ID = Intrinsic::hexagon_A4_cmpbgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpheq:
- ID = Intrinsic::hexagon_A2_vcmpheq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmphgt:
- ID = Intrinsic::hexagon_A2_vcmphgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmphgtu:
- ID = Intrinsic::hexagon_A2_vcmphgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpheqi:
- ID = Intrinsic::hexagon_A4_vcmpheqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmphgti:
- ID = Intrinsic::hexagon_A4_vcmphgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmphgtui:
- ID = Intrinsic::hexagon_A4_vcmphgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpheq:
- ID = Intrinsic::hexagon_A4_cmpheq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmphgt:
- ID = Intrinsic::hexagon_A4_cmphgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmphgtu:
- ID = Intrinsic::hexagon_A4_cmphgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmpheqi:
- ID = Intrinsic::hexagon_A4_cmpheqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmphgti:
- ID = Intrinsic::hexagon_A4_cmphgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_cmphgtui:
- ID = Intrinsic::hexagon_A4_cmphgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpweq:
- ID = Intrinsic::hexagon_A2_vcmpweq; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpwgt:
- ID = Intrinsic::hexagon_A2_vcmpwgt; break;
-
- case Hexagon::BI__builtin_HEXAGON_A2_vcmpwgtu:
- ID = Intrinsic::hexagon_A2_vcmpwgtu; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpweqi:
- ID = Intrinsic::hexagon_A4_vcmpweqi; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpwgti:
- ID = Intrinsic::hexagon_A4_vcmpwgti; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_vcmpwgtui:
- ID = Intrinsic::hexagon_A4_vcmpwgtui; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_boundscheck:
- ID = Intrinsic::hexagon_A4_boundscheck; break;
-
- case Hexagon::BI__builtin_HEXAGON_A4_tlbmatch:
- ID = Intrinsic::hexagon_A4_tlbmatch; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_tfrpr:
- ID = Intrinsic::hexagon_C2_tfrpr; break;
-
- case Hexagon::BI__builtin_HEXAGON_C2_tfrrp:
- ID = Intrinsic::hexagon_C2_tfrrp; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9:
- ID = Intrinsic::hexagon_C4_fastcorner9; break;
-
- case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9_not:
- ID = Intrinsic::hexagon_C4_fastcorner9_not; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_rnd_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_rnd_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_rnd_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_rnd_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_rnd_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_rnd_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_rnd_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_rnd_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_rnd_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1:
- ID = Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_acc_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_acc_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyd_acc_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyd_acc_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_acc_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_acc_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyd_acc_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_acc_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyd_acc_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_nac_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_nac_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyd_nac_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyd_nac_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_nac_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_nac_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyd_nac_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_nac_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyd_nac_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyd_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyd_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyd_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyd_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyd_rnd_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyd_rnd_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_acc_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_acc_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyu_acc_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyu_acc_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_acc_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_acc_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyu_acc_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_acc_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyu_acc_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_nac_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_nac_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyu_nac_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyu_nac_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_nac_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_nac_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyu_nac_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_nac_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyu_nac_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyu_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyu_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyu_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyu_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyu_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyu_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_acc_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_acc_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyud_acc_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyud_acc_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_acc_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_acc_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyud_acc_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_acc_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyud_acc_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_nac_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_nac_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyud_nac_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyud_nac_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_nac_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_nac_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyud_nac_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_nac_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyud_nac_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_hh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_hh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_hh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_hh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_hl_s0:
- ID = Intrinsic::hexagon_M2_mpyud_hl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_hl_s1:
- ID = Intrinsic::hexagon_M2_mpyud_hl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_lh_s0:
- ID = Intrinsic::hexagon_M2_mpyud_lh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_lh_s1:
- ID = Intrinsic::hexagon_M2_mpyud_lh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_ll_s0:
- ID = Intrinsic::hexagon_M2_mpyud_ll_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyud_ll_s1:
- ID = Intrinsic::hexagon_M2_mpyud_ll_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpysmi:
- ID = Intrinsic::hexagon_M2_mpysmi; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_macsip:
- ID = Intrinsic::hexagon_M2_macsip; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_macsin:
- ID = Intrinsic::hexagon_M2_macsin; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyss_s0:
- ID = Intrinsic::hexagon_M2_dpmpyss_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyss_acc_s0:
- ID = Intrinsic::hexagon_M2_dpmpyss_acc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyss_nac_s0:
- ID = Intrinsic::hexagon_M2_dpmpyss_nac_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyuu_s0:
- ID = Intrinsic::hexagon_M2_dpmpyuu_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyuu_acc_s0:
- ID = Intrinsic::hexagon_M2_dpmpyuu_acc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyuu_nac_s0:
- ID = Intrinsic::hexagon_M2_dpmpyuu_nac_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_up:
- ID = Intrinsic::hexagon_M2_mpy_up; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_up_s1:
- ID = Intrinsic::hexagon_M2_mpy_up_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpy_up_s1_sat:
- ID = Intrinsic::hexagon_M2_mpy_up_s1_sat; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyu_up:
- ID = Intrinsic::hexagon_M2_mpyu_up; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpysu_up:
- ID = Intrinsic::hexagon_M2_mpysu_up; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_dpmpyss_rnd_s0:
- ID = Intrinsic::hexagon_M2_dpmpyss_rnd_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mac_up_s1_sat:
- ID = Intrinsic::hexagon_M4_mac_up_s1_sat; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_nac_up_s1_sat:
- ID = Intrinsic::hexagon_M4_nac_up_s1_sat; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyi:
- ID = Intrinsic::hexagon_M2_mpyi; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mpyui:
- ID = Intrinsic::hexagon_M2_mpyui; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_maci:
- ID = Intrinsic::hexagon_M2_maci; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_acci:
- ID = Intrinsic::hexagon_M2_acci; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_accii:
- ID = Intrinsic::hexagon_M2_accii; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_nacci:
- ID = Intrinsic::hexagon_M2_nacci; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_naccii:
- ID = Intrinsic::hexagon_M2_naccii; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_subacc:
- ID = Intrinsic::hexagon_M2_subacc; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mpyrr_addr:
- ID = Intrinsic::hexagon_M4_mpyrr_addr; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr_u2:
- ID = Intrinsic::hexagon_M4_mpyri_addr_u2; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr:
- ID = Intrinsic::hexagon_M4_mpyri_addr; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addi:
- ID = Intrinsic::hexagon_M4_mpyri_addi; break;
-
- case Hexagon::BI__builtin_HEXAGON_M4_mpyrr_addi:
- ID = Intrinsic::hexagon_M4_mpyrr_addi; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s0:
- ID = Intrinsic::hexagon_M2_vmpy2s_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s1:
- ID = Intrinsic::hexagon_M2_vmpy2s_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2s_s0:
- ID = Intrinsic::hexagon_M2_vmac2s_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2s_s1:
- ID = Intrinsic::hexagon_M2_vmac2s_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2su_s0:
- ID = Intrinsic::hexagon_M2_vmpy2su_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2su_s1:
- ID = Intrinsic::hexagon_M2_vmpy2su_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2su_s0:
- ID = Intrinsic::hexagon_M2_vmac2su_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2su_s1:
- ID = Intrinsic::hexagon_M2_vmac2su_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s0pack:
- ID = Intrinsic::hexagon_M2_vmpy2s_s0pack; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s1pack:
- ID = Intrinsic::hexagon_M2_vmpy2s_s1pack; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2:
- ID = Intrinsic::hexagon_M2_vmac2; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2es_s0:
- ID = Intrinsic::hexagon_M2_vmpy2es_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmpy2es_s1:
- ID = Intrinsic::hexagon_M2_vmpy2es_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2es_s0:
- ID = Intrinsic::hexagon_M2_vmac2es_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2es_s1:
- ID = Intrinsic::hexagon_M2_vmac2es_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vmac2es:
- ID = Intrinsic::hexagon_M2_vmac2es; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vrmac_s0:
- ID = Intrinsic::hexagon_M2_vrmac_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vrmpy_s0:
- ID = Intrinsic::hexagon_M2_vrmpy_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmpyrs_s0:
- ID = Intrinsic::hexagon_M2_vdmpyrs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmpyrs_s1:
- ID = Intrinsic::hexagon_M2_vdmpyrs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vrmpybuu:
- ID = Intrinsic::hexagon_M5_vrmpybuu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vrmacbuu:
- ID = Intrinsic::hexagon_M5_vrmacbuu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vrmpybsu:
- ID = Intrinsic::hexagon_M5_vrmpybsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vrmacbsu:
- ID = Intrinsic::hexagon_M5_vrmacbsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vmpybuu:
- ID = Intrinsic::hexagon_M5_vmpybuu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vmpybsu:
- ID = Intrinsic::hexagon_M5_vmpybsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vmacbuu:
- ID = Intrinsic::hexagon_M5_vmacbuu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vmacbsu:
- ID = Intrinsic::hexagon_M5_vmacbsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vdmpybsu:
- ID = Intrinsic::hexagon_M5_vdmpybsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M5_vdmacbsu:
- ID = Intrinsic::hexagon_M5_vdmacbsu; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmacs_s0:
- ID = Intrinsic::hexagon_M2_vdmacs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmacs_s1:
- ID = Intrinsic::hexagon_M2_vdmacs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmpys_s0:
- ID = Intrinsic::hexagon_M2_vdmpys_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vdmpys_s1:
- ID = Intrinsic::hexagon_M2_vdmpys_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpyrs_s0:
- ID = Intrinsic::hexagon_M2_cmpyrs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpyrs_s1:
- ID = Intrinsic::hexagon_M2_cmpyrs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpyrsc_s0:
- ID = Intrinsic::hexagon_M2_cmpyrsc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpyrsc_s1:
- ID = Intrinsic::hexagon_M2_cmpyrsc_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmacs_s0:
- ID = Intrinsic::hexagon_M2_cmacs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmacs_s1:
- ID = Intrinsic::hexagon_M2_cmacs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmacsc_s0:
- ID = Intrinsic::hexagon_M2_cmacsc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmacsc_s1:
- ID = Intrinsic::hexagon_M2_cmacsc_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpys_s0:
- ID = Intrinsic::hexagon_M2_cmpys_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpys_s1:
- ID = Intrinsic::hexagon_M2_cmpys_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpysc_s0:
- ID = Intrinsic::hexagon_M2_cmpysc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cmpysc_s1:
- ID = Intrinsic::hexagon_M2_cmpysc_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cnacs_s0:
- ID = Intrinsic::hexagon_M2_cnacs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cnacs_s1:
- ID = Intrinsic::hexagon_M2_cnacs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cnacsc_s0:
- ID = Intrinsic::hexagon_M2_cnacsc_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_cnacsc_s1:
- ID = Intrinsic::hexagon_M2_cnacsc_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vrcmpys_s1:
- ID = Intrinsic::hexagon_M2_vrcmpys_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vrcmpys_acc_s1:
- ID = Intrinsic::hexagon_M2_vrcmpys_acc_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_vrcmpys_s1rp:
- ID = Intrinsic::hexagon_M2_vrcmpys_s1rp; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmacls_s0:
- ID = Intrinsic::hexagon_M2_mmacls_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmacls_s1:
- ID = Intrinsic::hexagon_M2_mmacls_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmachs_s0:
- ID = Intrinsic::hexagon_M2_mmachs_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmachs_s1:
- ID = Intrinsic::hexagon_M2_mmachs_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmpyl_s0:
- ID = Intrinsic::hexagon_M2_mmpyl_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmpyl_s1:
- ID = Intrinsic::hexagon_M2_mmpyl_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmpyh_s0:
- ID = Intrinsic::hexagon_M2_mmpyh_s0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmpyh_s1:
- ID = Intrinsic::hexagon_M2_mmpyh_s1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmacls_rs0:
- ID = Intrinsic::hexagon_M2_mmacls_rs0; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmacls_rs1:
- ID = Intrinsic::hexagon_M2_mmacls_rs1; break;
-
- case Hexagon::BI__builtin_HEXAGON_M2_mmachs_rs0:
- ID = Intrinsic::hexagon_M2_mmachs_rs