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authorDavid Barksdale <amatus@amat.us>2023-08-06 13:16:30 -0500
committerDavid Barksdale <amatus@amat.us>2023-08-06 13:16:30 -0500
commit2e584b8a27c7959b9f0ac1775db63dcc0aea1653 (patch)
tree11991d6c83fd087c60494d62d31943af383ddd69
parent71a0463206a224c56225aeb74c16d112a9239cb0 (diff)
Software changes for V2HEADmaster
Diffstat
-rw-r--r--KSDK_1.2.0/usb/adapter/sources/sdk/adapter_sdk.h2
-rw-r--r--laser-tag software/CMakeLists.txt14
-rw-r--r--laser-tag software/README27
-rw-r--r--laser-tag software/RFM69registers.h1109
-rw-r--r--laser-tag software/aha_v2.im1bin0 -> 6016 bytes
-rwxr-xr-xlaser-tag software/build_all.sh4
-rwxr-xr-xlaser-tag software/build_debug.sh2
-rwxr-xr-xlaser-tag software/build_release.sh2
-rw-r--r--laser-tag software/defcon31.im1bin0 -> 6016 bytes
-rw-r--r--laser-tag software/disk.c64
-rw-r--r--laser-tag software/disk.h12
-rw-r--r--laser-tag software/epaper.c198
-rw-r--r--laser-tag software/epaper.h8
-rw-r--r--laser-tag software/flash.c55
-rw-r--r--laser-tag software/flash.h2
-rw-r--r--laser-tag software/gdb.init4
-rw-r--r--laser-tag software/lptmr.c45
-rw-r--r--laser-tag software/lptmr.h10
-rw-r--r--laser-tag software/main.c343
-rw-r--r--laser-tag software/radio.c207
-rw-r--r--laser-tag software/radio.h7
-rw-r--r--laser-tag software/threatbutt_v2.im1bin0 -> 6016 bytes
-rw-r--r--laser-tag software/usb_descriptor.c10
23 files changed, 516 insertions, 1609 deletions
diff --git a/KSDK_1.2.0/usb/adapter/sources/sdk/adapter_sdk.h b/KSDK_1.2.0/usb/adapter/sources/sdk/adapter_sdk.h
index 7e62da2..f161718 100644
--- a/KSDK_1.2.0/usb/adapter/sources/sdk/adapter_sdk.h
+++ b/KSDK_1.2.0/usb/adapter/sources/sdk/adapter_sdk.h
@@ -43,8 +43,10 @@
#include <stdlib.h>
#include "fsl_debug_console.h"
+#ifndef BIG_ENDIAN
#define BIG_ENDIAN 0
#define LITTLE_ENDIAN 1
+#endif
#define ENDIANNESS LITTLE_ENDIAN
diff --git a/laser-tag software/CMakeLists.txt b/laser-tag software/CMakeLists.txt
index 3ecb693..a42dd25 100644
--- a/laser-tag software/CMakeLists.txt
+++ b/laser-tag software/CMakeLists.txt
@@ -56,17 +56,16 @@ SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DNDEBUG")
SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DFRDM_KL27Z")
SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DFREEDOM")
-option(BADGE_V1 "Badge Hardware V1" OFF)
-option(BADGE_V2 "Badge Hardware V2" ON)
+option(BADGE_V "Badge Hardware Version" "1")
-if(BADGE_V1)
+if(BADGE_V EQUAL "1")
SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DCPU_MKL27Z256VLH4")
SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DCPU_MKL27Z256VLH4")
SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DBADGE_V1")
SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DBADGE_V1")
endif()
-if(BADGE_V2)
+if(BADGE_V EQUAL "2")
SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DCPU_MKL27Z256VFT4")
SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DCPU_MKL27Z256VFT4")
SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DBADGE_V2")
@@ -180,13 +179,10 @@ ADD_EXECUTABLE(hello_world
"${ProjDirPath}/../KSDK_1.2.0/platform/drivers/src/flash/C90TFS/drvsrc/include/SSD_FTFx_Internal.h"
"${ProjDirPath}/../KSDK_1.2.0/platform/drivers/src/flash/C90TFS/drvsrc/include/SSD_Types.h"
"${ProjDirPath}/main.c"
+ "${ProjDirPath}/lptmr.c"
+ "${ProjDirPath}/lptmr.h"
"${ProjDirPath}/epaper.c"
"${ProjDirPath}/epaper.h"
- "${ProjDirPath}/text.c"
- "${ProjDirPath}/text.h"
- "${ProjDirPath}/radio.c"
- "${ProjDirPath}/radio.h"
- "${ProjDirPath}/RFM69registers.h"
"${ProjDirPath}/disk.c"
"${ProjDirPath}/disk.h"
"${ProjDirPath}/usb_descriptor.c"
diff --git a/laser-tag software/README b/laser-tag software/README
index 10c5895..7efc241 100644
--- a/laser-tag software/README
+++ b/laser-tag software/README
@@ -7,7 +7,8 @@ Build instructions for Ubuntu:
2) cd ../KSDK_1.2.0/usb/usb_core/device/build/armgcc/usbd_sdk_frdmkl27z_bm
./build_all.sh
cd -
-3) ./build_debug.sh -or- ./build_release.sh
+3) ./build_debug.sh -DBADGE_V=2 -or- ./build_release.sh -DBADGE_V=2
+ or -DBADGE_V=1 for V1 hardware
Load instructions Kinetis Bootloader:
0) Download the Kinetis Bootloader[0]. (registration required)
@@ -18,12 +19,12 @@ Load instructions Kinetis Bootloader:
blhost -u -- flash-erase-region 0 0x20000
blhost -u -- write-memory 0 hello_world.bin
5) Load graphics if desired:
- blhost -u -- flash-erase-region 0x20000 0x5000
+ blhost -u -- flash-erase-region 0x20000 0x7800
blhost -u -- write-memory 0x20000 aha.im1
- blhost -u -- write-memory 0x21000 dc24.im1
- blhost -u -- write-memory 0x22000 my_name_is.im1
- blhost -u -- write-memory 0x23000 longhorn_lockpicking.im1
- blhost -u -- write-memory 0x24000 threatbutt.im1
+ blhost -u -- write-memory 0x21800 dc24.im1
+ blhost -u -- write-memory 0x23000 my_name_is.im1
+ blhost -u -- write-memory 0x24800 longhorn_lockpicking.im1
+ blhost -u -- write-memory 0x26000 threatbutt.im1
6) Reset the badge or:
blhost -u -- reset
@@ -38,18 +39,10 @@ Load instructions for openocd:
gdb) monitor reset
Creating graphics:
-0) Create a 232 x 128 black and white (not greyscale) image
+0) V1: Create a 232 x 128 black and white (not greyscale) image
+ V2: Create a 264 x 176 black and white (not greyscale) image
1) Use gimp to convert it to "SUN Rasterfile image" with the extension .im1
2) Choose Standard Data Formatting, not RunLength Encoded
-3) Check that the image file size is 3872 bytes
-
-Load images with blhost:
- blhost -u -- flash-erase-region 0x20000 0x5000
- blhost -u -- write-memory 0x20000 image0.im1
- blhost -u -- write-memory 0x21000 image1.im1
- blhost -u -- write-memory 0x22000 image2.im1
- blhost -u -- write-memory 0x23000 image3.im1
- blhost -u -- write-memory 0x24000 image4.im1
Load images with dd:
0) Plug the badge in to your computer's USB port
@@ -62,4 +55,4 @@ Load images with dd:
dd if=image3.im1 of=/dev/sde
dd if=image4.im1 of=/dev/sdf
-[0] http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m/kinetis-symbols-footprints-and-models/kinetis-bootloader:KBOOT
+[0] https://www.nxp.com/kboot
diff --git a/laser-tag software/RFM69registers.h b/laser-tag software/RFM69registers.h
deleted file mode 100644
index 2d815ec..0000000
--- a/laser-tag software/RFM69registers.h
+++ /dev/null
@@ -1,1109 +0,0 @@
-// **********************************************************************************
-// Registers used in driver definition for HopeRF RFM69W/RFM69HW, Semtech SX1231/1231H
-// **********************************************************************************
-// Copyright Felix Rusu (2015), felix@lowpowerlab.com
-// http://lowpowerlab.com/
-// **********************************************************************************
-// License
-// **********************************************************************************
-// This program is free software; you can redistribute it
-// and/or modify it under the terms of the GNU General
-// Public License as published by the Free Software
-// Foundation; either version 2 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will
-// be useful, but WITHOUT ANY WARRANTY; without even the
-// implied warranty of MERCHANTABILITY or FITNESS FOR A
-// PARTICULAR PURPOSE. See the GNU General Public
-// License for more details.
-//
-// You should have received a copy of the GNU General
-// Public License along with this program; if not, write
-// to the Free Software Foundation, Inc.,
-// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-//
-// Licence can be viewed at
-// http://www.fsf.org/licenses/gpl.txt
-//
-// Please maintain this license information along with authorship
-// and copyright notices in any redistribution of this code
-// **********************************************************************************
-// RFM69/SX1231 Internal registers addresses
-//**************************************************
-#define REG_FIFO 0x00
-#define REG_OPMODE 0x01
-#define REG_DATAMODUL 0x02
-#define REG_BITRATEMSB 0x03
-#define REG_BITRATELSB 0x04
-#define REG_FDEVMSB 0x05
-#define REG_FDEVLSB 0x06
-#define REG_FRFMSB 0x07
-#define REG_FRFMID 0x08
-#define REG_FRFLSB 0x09
-#define REG_OSC1 0x0A
-#define REG_AFCCTRL 0x0B
-#define REG_LOWBAT 0x0C
-#define REG_LISTEN1 0x0D
-#define REG_LISTEN2 0x0E
-#define REG_LISTEN3 0x0F
-#define REG_VERSION 0x10
-#define REG_PALEVEL 0x11
-#define REG_PARAMP 0x12
-#define REG_OCP 0x13
-#define REG_AGCREF 0x14 // not present on RFM69/SX1231
-#define REG_AGCTHRESH1 0x15 // not present on RFM69/SX1231
-#define REG_AGCTHRESH2 0x16 // not present on RFM69/SX1231
-#define REG_AGCTHRESH3 0x17 // not present on RFM69/SX1231
-#define REG_LNA 0x18
-#define REG_RXBW 0x19
-#define REG_AFCBW 0x1A
-#define REG_OOKPEAK 0x1B
-#define REG_OOKAVG 0x1C
-#define REG_OOKFIX 0x1D
-#define REG_AFCFEI 0x1E
-#define REG_AFCMSB 0x1F
-#define REG_AFCLSB 0x20
-#define REG_FEIMSB 0x21
-#define REG_FEILSB 0x22
-#define REG_RSSICONFIG 0x23
-#define REG_RSSIVALUE 0x24
-#define REG_DIOMAPPING1 0x25
-#define REG_DIOMAPPING2 0x26
-#define REG_IRQFLAGS1 0x27
-#define REG_IRQFLAGS2 0x28
-#define REG_RSSITHRESH 0x29
-#define REG_RXTIMEOUT1 0x2A
-#define REG_RXTIMEOUT2 0x2B
-#define REG_PREAMBLEMSB 0x2C
-#define REG_PREAMBLELSB 0x2D
-#define REG_SYNCCONFIG 0x2E
-#define REG_SYNCVALUE1 0x2F
-#define REG_SYNCVALUE2 0x30
-#define REG_SYNCVALUE3 0x31
-#define REG_SYNCVALUE4 0x32
-#define REG_SYNCVALUE5 0x33
-#define REG_SYNCVALUE6 0x34
-#define REG_SYNCVALUE7 0x35
-#define REG_SYNCVALUE8 0x36
-#define REG_PACKETCONFIG1 0x37
-#define REG_PAYLOADLENGTH 0x38
-#define REG_NODEADRS 0x39
-#define REG_BROADCASTADRS 0x3A
-#define REG_AUTOMODES 0x3B
-#define REG_FIFOTHRESH 0x3C
-#define REG_PACKETCONFIG2 0x3D
-#define REG_AESKEY1 0x3E
-#define REG_AESKEY2 0x3F
-#define REG_AESKEY3 0x40
-#define REG_AESKEY4 0x41
-#define REG_AESKEY5 0x42
-#define REG_AESKEY6 0x43
-#define REG_AESKEY7 0x44
-#define REG_AESKEY8 0x45
-#define REG_AESKEY9 0x46
-#define REG_AESKEY10 0x47
-#define REG_AESKEY11 0x48
-#define REG_AESKEY12 0x49
-#define REG_AESKEY13 0x4A
-#define REG_AESKEY14 0x4B
-#define REG_AESKEY15 0x4C
-#define REG_AESKEY16 0x4D
-#define REG_TEMP1 0x4E
-#define REG_TEMP2 0x4F
-#define REG_TESTLNA 0x58
-#define REG_TESTPA1 0x5A // only present on RFM69HW/SX1231H
-#define REG_TESTPA2 0x5C // only present on RFM69HW/SX1231H
-#define REG_TESTDAGC 0x6F
-
-//******************************************************
-// RF69/SX1231 bit control definition
-//******************************************************
-
-// RegOpMode
-#define RF_OPMODE_SEQUENCER_OFF 0x80
-#define RF_OPMODE_SEQUENCER_ON 0x00 // Default
-
-#define RF_OPMODE_LISTEN_ON 0x40
-#define RF_OPMODE_LISTEN_OFF 0x00 // Default
-
-#define RF_OPMODE_LISTENABORT 0x20
-
-#define RF_OPMODE_SLEEP 0x00
-#define RF_OPMODE_STANDBY 0x04 // Default
-#define RF_OPMODE_SYNTHESIZER 0x08
-#define RF_OPMODE_TRANSMITTER 0x0C
-#define RF_OPMODE_RECEIVER 0x10
-
-
-// RegDataModul
-#define RF_DATAMODUL_DATAMODE_PACKET 0x00 // Default
-#define RF_DATAMODUL_DATAMODE_CONTINUOUS 0x40
-#define RF_DATAMODUL_DATAMODE_CONTINUOUSNOBSYNC 0x60
-
-#define RF_DATAMODUL_MODULATIONTYPE_FSK 0x00 // Default
-#define RF_DATAMODUL_MODULATIONTYPE_OOK 0x08
-
-#define RF_DATAMODUL_MODULATIONSHAPING_00 0x00 // Default
-#define RF_DATAMODUL_MODULATIONSHAPING_01 0x01
-#define RF_DATAMODUL_MODULATIONSHAPING_10 0x02
-#define RF_DATAMODUL_MODULATIONSHAPING_11 0x03
-
-
-// RegBitRate (bits/sec) example bit rates
-#define RF_BITRATEMSB_1200 0x68
-#define RF_BITRATELSB_1200 0x2B
-#define RF_BITRATEMSB_2400 0x34
-#define RF_BITRATELSB_2400 0x15
-#define RF_BITRATEMSB_4800 0x1A // Default
-#define RF_BITRATELSB_4800 0x0B // Default
-#define RF_BITRATEMSB_9600 0x0D
-#define RF_BITRATELSB_9600 0x05
-#define RF_BITRATEMSB_19200 0x06
-#define RF_BITRATELSB_19200 0x83
-#define RF_BITRATEMSB_38400 0x03
-#define RF_BITRATELSB_38400 0x41
-
-#define RF_BITRATEMSB_38323 0x03
-#define RF_BITRATELSB_38323 0x43
-
-#define RF_BITRATEMSB_34482 0x03
-#define RF_BITRATELSB_34482 0xA0
-
-#define RF_BITRATEMSB_76800 0x01
-#define RF_BITRATELSB_76800 0xA1
-#define RF_BITRATEMSB_153600 0x00
-#define RF_BITRATELSB_153600 0xD0
-#define RF_BITRATEMSB_57600 0x02
-#define RF_BITRATELSB_57600 0x2C
-#define RF_BITRATEMSB_115200 0x01
-#define RF_BITRATELSB_115200 0x16
-#define RF_BITRATEMSB_12500 0x0A
-#define RF_BITRATELSB_12500 0x00
-#define RF_BITRATEMSB_25000 0x05
-#define RF_BITRATELSB_25000 0x00
-#define RF_BITRATEMSB_50000 0x02
-#define RF_BITRATELSB_50000 0x80
-#define RF_BITRATEMSB_100000 0x01
-#define RF_BITRATELSB_100000 0x40
-#define RF_BITRATEMSB_150000 0x00
-#define RF_BITRATELSB_150000 0xD5
-#define RF_BITRATEMSB_200000 0x00
-#define RF_BITRATELSB_200000 0xA0
-#define RF_BITRATEMSB_250000 0x00
-#define RF_BITRATELSB_250000 0x80
-#define RF_BITRATEMSB_300000 0x00
-#define RF_BITRATELSB_300000 0x6B
-#define RF_BITRATEMSB_32768 0x03
-#define RF_BITRATELSB_32768 0xD1
-// custom bit rates
-#define RF_BITRATEMSB_55555 0x02
-#define RF_BITRATELSB_55555 0x40
-#define RF_BITRATEMSB_200KBPS 0x00
-#define RF_BITRATELSB_200KBPS 0xa0
-
-
-// RegFdev - frequency deviation (Hz)
-#define RF_FDEVMSB_2000 0x00
-#define RF_FDEVLSB_2000 0x21
-#define RF_FDEVMSB_5000 0x00 // Default
-#define RF_FDEVLSB_5000 0x52 // Default
-#define RF_FDEVMSB_7500 0x00
-#define RF_FDEVLSB_7500 0x7B
-#define RF_FDEVMSB_10000 0x00
-#define RF_FDEVLSB_10000 0xA4
-#define RF_FDEVMSB_15000 0x00
-#define RF_FDEVLSB_15000 0xF6
-#define RF_FDEVMSB_20000 0x01
-#define RF_FDEVLSB_20000 0x48
-#define RF_FDEVMSB_25000 0x01
-#define RF_FDEVLSB_25000 0x9A
-#define RF_FDEVMSB_30000 0x01
-#define RF_FDEVLSB_30000 0xEC
-#define RF_FDEVMSB_35000 0x02
-#define RF_FDEVLSB_35000 0x3D
-#define RF_FDEVMSB_40000 0x02
-#define RF_FDEVLSB_40000 0x8F
-#define RF_FDEVMSB_45000 0x02
-#define RF_FDEVLSB_45000 0xE1
-#define RF_FDEVMSB_50000 0x03
-#define RF_FDEVLSB_50000 0x33
-#define RF_FDEVMSB_55000 0x03
-#define RF_FDEVLSB_55000 0x85
-#define RF_FDEVMSB_60000 0x03
-#define RF_FDEVLSB_60000 0xD7
-#define RF_FDEVMSB_65000 0x04
-#define RF_FDEVLSB_65000 0x29
-#define RF_FDEVMSB_70000 0x04
-#define RF_FDEVLSB_70000 0x7B
-#define RF_FDEVMSB_75000 0x04
-#define RF_FDEVLSB_75000 0xCD
-#define RF_FDEVMSB_80000 0x05
-#define RF_FDEVLSB_80000 0x1F
-#define RF_FDEVMSB_85000 0x05
-#define RF_FDEVLSB_85000 0x71
-#define RF_FDEVMSB_90000 0x05
-#define RF_FDEVLSB_90000 0xC3
-#define RF_FDEVMSB_95000 0x06
-#define RF_FDEVLSB_95000 0x14
-#define RF_FDEVMSB_100000 0x06
-#define RF_FDEVLSB_100000 0x66
-#define RF_FDEVMSB_110000 0x07
-#define RF_FDEVLSB_110000 0x0A
-#define RF_FDEVMSB_120000 0x07
-#define RF_FDEVLSB_120000 0xAE
-#define RF_FDEVMSB_130000 0x08
-#define RF_FDEVLSB_130000 0x52
-#define RF_FDEVMSB_140000 0x08
-#define RF_FDEVLSB_140000 0xF6
-#define RF_FDEVMSB_150000 0x09
-#define RF_FDEVLSB_150000 0x9A
-#define RF_FDEVMSB_160000 0x0A
-#define RF_FDEVLSB_160000 0x3D
-#define RF_FDEVMSB_170000 0x0A
-#define RF_FDEVLSB_170000 0xE1
-#define RF_FDEVMSB_180000 0x0B
-#define RF_FDEVLSB_180000 0x85
-#define RF_FDEVMSB_190000 0x0C
-#define RF_FDEVLSB_190000 0x29
-#define RF_FDEVMSB_200000 0x0C
-#define RF_FDEVLSB_200000 0xCD
-#define RF_FDEVMSB_210000 0x0D
-#define RF_FDEVLSB_210000 0x71
-#define RF_FDEVMSB_220000 0x0E
-#define RF_FDEVLSB_220000 0x14
-#define RF_FDEVMSB_230000 0x0E
-#define RF_FDEVLSB_230000 0xB8
-#define RF_FDEVMSB_240000 0x0F
-#define RF_FDEVLSB_240000 0x5C
-#define RF_FDEVMSB_250000 0x10
-#define RF_FDEVLSB_250000 0x00
-#define RF_FDEVMSB_260000 0x10
-#define RF_FDEVLSB_260000 0xA4
-#define RF_FDEVMSB_270000 0x11
-#define RF_FDEVLSB_270000 0x48
-#define RF_FDEVMSB_280000 0x11
-#define RF_FDEVLSB_280000 0xEC
-#define RF_FDEVMSB_290000 0x12
-#define RF_FDEVLSB_290000 0x8F
-#define RF_FDEVMSB_300000 0x13
-#define RF_FDEVLSB_300000 0x33
-
-
-// RegFrf (MHz) - carrier frequency
-// 315Mhz band
-#define RF_FRFMSB_314 0x4E
-#define RF_FRFMID_314 0x80
-#define RF_FRFLSB_314 0x00
-#define RF_FRFMSB_315 0x4E
-#define RF_FRFMID_315 0xC0
-#define RF_FRFLSB_315 0x00
-#define RF_FRFMSB_316 0x4F
-#define RF_FRFMID_316 0x00
-#define RF_FRFLSB_316 0x00
-// 433mhz band
-#define RF_FRFMSB_433 0x6C
-#define RF_FRFMID_433 0x40
-#define RF_FRFLSB_433 0x00
-#define RF_FRFMSB_434 0x6C
-#define RF_FRFMID_434 0x80
-#define RF_FRFLSB_434 0x00
-#define RF_FRFMSB_435 0x6C
-#define RF_FRFMID_435 0xC0
-#define RF_FRFLSB_435 0x00
-// 868Mhz band
-#define RF_FRFMSB_863 0xD7
-#define RF_FRFMID_863 0xC0
-#define RF_FRFLSB_863 0x00
-#define RF_FRFMSB_864 0xD8
-#define RF_FRFMID_864 0x00
-#define RF_FRFLSB_864 0x00
-#define RF_FRFMSB_865 0xD8
-#define RF_FRFMID_865 0x40
-#define RF_FRFLSB_865 0x00
-#define RF_FRFMSB_866 0xD8
-#define RF_FRFMID_866 0x80
-#define RF_FRFLSB_866 0x00
-#define RF_FRFMSB_867 0xD8
-#define RF_FRFMID_867 0xC0
-#define RF_FRFLSB_867 0x00
-#define RF_FRFMSB_868 0xD9
-#define RF_FRFMID_868 0x00
-#define RF_FRFLSB_868 0x00
-#define RF_FRFMSB_869 0xD9
-#define RF_FRFMID_869 0x40
-#define RF_FRFLSB_869 0x00
-#define RF_FRFMSB_870 0xD9
-#define RF_FRFMID_870 0x80
-#define RF_FRFLSB_870 0x00
-// 915Mhz band
-#define RF_FRFMSB_902 0xE1
-#define RF_FRFMID_902 0x80
-#define RF_FRFLSB_902 0x00
-#define RF_FRFMSB_903 0xE1
-#define RF_FRFMID_903 0xC0
-#define RF_FRFLSB_903 0x00
-#define RF_FRFMSB_904 0xE2
-#define RF_FRFMID_904 0x00
-#define RF_FRFLSB_904 0x00
-#define RF_FRFMSB_905 0xE2
-#define RF_FRFMID_905 0x40
-#define RF_FRFLSB_905 0x00
-#define RF_FRFMSB_906 0xE2
-#define RF_FRFMID_906 0x80
-#define RF_FRFLSB_906 0x00
-#define RF_FRFMSB_907 0xE2
-#define RF_FRFMID_907 0xC0
-#define RF_FRFLSB_907 0x00
-#define RF_FRFMSB_908 0xE3
-#define RF_FRFMID_908 0x00
-#define RF_FRFLSB_908 0x00
-#define RF_FRFMSB_909 0xE3
-#define RF_FRFMID_909 0x40
-#define RF_FRFLSB_909 0x00
-#define RF_FRFMSB_910 0xE3
-#define RF_FRFMID_910 0x80
-#define RF_FRFLSB_910 0x00
-#define RF_FRFMSB_911 0xE3
-#define RF_FRFMID_911 0xC0
-#define RF_FRFLSB_911 0x00
-#define RF_FRFMSB_912 0xE4
-#define RF_FRFMID_912 0x00
-#define RF_FRFLSB_912 0x00
-#define RF_FRFMSB_913 0xE4
-#define RF_FRFMID_913 0x40
-#define RF_FRFLSB_913 0x00
-#define RF_FRFMSB_914 0xE4
-#define RF_FRFMID_914 0x80
-#define RF_FRFLSB_914 0x00
-#define RF_FRFMSB_915 0xE4 // Default
-#define RF_FRFMID_915 0xC0 // Default
-#define RF_FRFLSB_915 0x00 // Default
-#define RF_FRFMSB_916 0xE5
-#define RF_FRFMID_916 0x00
-#define RF_FRFLSB_916 0x00
-#define RF_FRFMSB_917 0xE5
-#define RF_FRFMID_917 0x40
-#define RF_FRFLSB_917 0x00
-#define RF_FRFMSB_918 0xE5
-#define RF_FRFMID_918 0x80
-#define RF_FRFLSB_918 0x00
-#define RF_FRFMSB_919 0xE5
-#define RF_FRFMID_919 0xC0
-#define RF_FRFLSB_919 0x00
-#define RF_FRFMSB_920 0xE6
-#define RF_FRFMID_920 0x00
-#define RF_FRFLSB_920 0x00
-#define RF_FRFMSB_921 0xE6
-#define RF_FRFMID_921 0x40
-#define RF_FRFLSB_921 0x00
-#define RF_FRFMSB_922 0xE6
-#define RF_FRFMID_922 0x80
-#define RF_FRFLSB_922 0x00
-#define RF_FRFMSB_923 0xE6
-#define RF_FRFMID_923 0xC0
-#define RF_FRFLSB_923 0x00
-#define RF_FRFMSB_924 0xE7
-#define RF_FRFMID_924 0x00
-#define RF_FRFLSB_924 0x00
-#define RF_FRFMSB_925 0xE7
-#define RF_FRFMID_925 0x40
-#define RF_FRFLSB_925 0x00
-#define RF_FRFMSB_926 0xE7
-#define RF_FRFMID_926 0x80
-#define RF_FRFLSB_926 0x00
-#define RF_FRFMSB_927 0xE7
-#define RF_FRFMID_927 0xC0
-#define RF_FRFLSB_927 0x00
-#define RF_FRFMSB_928 0xE8
-#define RF_FRFMID_928 0x00
-#define RF_FRFLSB_928 0x00
-
-
-// RegOsc1
-#define RF_OSC1_RCCAL_START 0x80
-#define RF_OSC1_RCCAL_DONE 0x40
-
-
-// RegAfcCtrl
-#define RF_AFCCTRL_LOWBETA_OFF 0x00 // Default
-#define RF_AFCCTRL_LOWBETA_ON 0x20
-
-
-// RegLowBat
-#define RF_LOWBAT_MONITOR 0x10
-#define RF_LOWBAT_ON 0x08
-#define RF_LOWBAT_OFF 0x00 // Default
-
-#define RF_LOWBAT_TRIM_1695 0x00
-#define RF_LOWBAT_TRIM_1764 0x01
-#define RF_LOWBAT_TRIM_1835 0x02 // Default
-#define RF_LOWBAT_TRIM_1905 0x03
-#define RF_LOWBAT_TRIM_1976 0x04
-#define RF_LOWBAT_TRIM_2045 0x05
-#define RF_LOWBAT_TRIM_2116 0x06
-#define RF_LOWBAT_TRIM_2185 0x07
-
-
-// RegListen1
-#define RF_LISTEN1_RESOL_64 0x50
-#define RF_LISTEN1_RESOL_4100 0xA0 // Default
-#define RF_LISTEN1_RESOL_262000 0xF0
-
-#define RF_LISTEN1_RESOL_IDLE_64 0x40
-#define RF_LISTEN1_RESOL_IDLE_4100 0x80 // Default
-#define RF_LISTEN1_RESOL_IDLE_262000 0xC0
-
-#define RF_LISTEN1_RESOL_RX_64 0x10
-#define RF_LISTEN1_RESOL_RX_4100 0x20 // Default
-#define RF_LISTEN1_RESOL_RX_262000 0x30
-
-#define RF_LISTEN1_CRITERIA_RSSI 0x00 // Default
-#define RF_LISTEN1_CRITERIA_RSSIANDSYNC 0x08
-
-#define RF_LISTEN1_END_00 0x00
-#define RF_LISTEN1_END_01 0x02 // Default
-#define RF_LISTEN1_END_10 0x04
-
-
-// RegListen2
-#define RF_LISTEN2_COEFIDLE_VALUE 0xF5 // Default
-
-
-// RegListen3
-#define RF_LISTEN3_COEFRX_VALUE 0x20 // Default
-
-
-// RegVersion
-#define RF_VERSION_VER 0x24 // Default
-
-
-// RegPaLevel
-#define RF_PALEVEL_PA0_ON 0x80 // Default
-#define RF_PALEVEL_PA0_OFF 0x00
-#define RF_PALEVEL_PA1_ON 0x40
-#define RF_PALEVEL_PA1_OFF 0x00 // Default
-#define RF_PALEVEL_PA2_ON 0x20
-#define RF_PALEVEL_PA2_OFF 0x00 // Default
-
-#define RF_PALEVEL_OUTPUTPOWER_00000 0x00
-#define RF_PALEVEL_OUTPUTPOWER_00001 0x01
-#define RF_PALEVEL_OUTPUTPOWER_00010 0x02
-#define RF_PALEVEL_OUTPUTPOWER_00011 0x03
-#define RF_PALEVEL_OUTPUTPOWER_00100 0x04
-#define RF_PALEVEL_OUTPUTPOWER_00101 0x05
-#define RF_PALEVEL_OUTPUTPOWER_00110 0x06
-#define RF_PALEVEL_OUTPUTPOWER_00111 0x07
-#define RF_PALEVEL_OUTPUTPOWER_01000 0x08
-#define RF_PALEVEL_OUTPUTPOWER_01001 0x09
-#define RF_PALEVEL_OUTPUTPOWER_01010 0x0A
-#define RF_PALEVEL_OUTPUTPOWER_01011 0x0B
-#define RF_PALEVEL_OUTPUTPOWER_01100 0x0C
-#define RF_PALEVEL_OUTPUTPOWER_01101 0x0D
-#define RF_PALEVEL_OUTPUTPOWER_01110 0x0E
-#define RF_PALEVEL_OUTPUTPOWER_01111 0x0F
-#define RF_PALEVEL_OUTPUTPOWER_10000 0x10
-#define RF_PALEVEL_OUTPUTPOWER_10001 0x11
-#define RF_PALEVEL_OUTPUTPOWER_10010 0x12
-#define RF_PALEVEL_OUTPUTPOWER_10011 0x13
-#define RF_PALEVEL_OUTPUTPOWER_10100 0x14
-#define RF_PALEVEL_OUTPUTPOWER_10101 0x15
-#define RF_PALEVEL_OUTPUTPOWER_10110 0x16
-#define RF_PALEVEL_OUTPUTPOWER_10111 0x17
-#define RF_PALEVEL_OUTPUTPOWER_11000 0x18
-#define RF_PALEVEL_OUTPUTPOWER_11001 0x19
-#define RF_PALEVEL_OUTPUTPOWER_11010 0x1A
-#define RF_PALEVEL_OUTPUTPOWER_11011 0x1B
-#define RF_PALEVEL_OUTPUTPOWER_11100 0x1C
-#define RF_PALEVEL_OUTPUTPOWER_11101 0x1D
-#define RF_PALEVEL_OUTPUTPOWER_11110 0x1E
-#define RF_PALEVEL_OUTPUTPOWER_11111 0x1F // Default
-
-
-// RegPaRamp
-#define RF_PARAMP_3400 0x00
-#define RF_PARAMP_2000 0x01
-#define RF_PARAMP_1000 0x02
-#define RF_PARAMP_500 0x03
-#define RF_PARAMP_250 0x04
-#define RF_PARAMP_125 0x05
-#define RF_PARAMP_100 0x06
-#define RF_PARAMP_62 0x07
-#define RF_PARAMP_50 0x08
-#define RF_PARAMP_40 0x09 // Default
-#define RF_PARAMP_31 0x0A
-#define RF_PARAMP_25 0x0B
-#define RF_PARAMP_20 0x0C
-#define RF_PARAMP_15 0x0D
-#define RF_PARAMP_12 0x0E
-#define RF_PARAMP_10 0x0F
-
-
-// RegOcp
-#define RF_OCP_OFF 0x0F
-#define RF_OCP_ON 0x1A // Default
-
-#define RF_OCP_TRIM_45 0x00
-#define RF_OCP_TRIM_50 0x01
-#define RF_OCP_TRIM_55 0x02
-#define RF_OCP_TRIM_60 0x03
-#define RF_OCP_TRIM_65 0x04
-#define RF_OCP_TRIM_70 0x05
-#define RF_OCP_TRIM_75 0x06
-#define RF_OCP_TRIM_80 0x07
-#define RF_OCP_TRIM_85 0x08
-#define RF_OCP_TRIM_90 0x09
-#define RF_OCP_TRIM_95 0x0A // Default
-#define RF_OCP_TRIM_100 0x0B
-#define RF_OCP_TRIM_105 0x0C
-#define RF_OCP_TRIM_110 0x0D
-#define RF_OCP_TRIM_115 0x0E
-#define RF_OCP_TRIM_120 0x0F
-
-
-// RegAgcRef - not present on RFM69/SX1231
-#define RF_AGCREF_AUTO_ON 0x40 // Default
-#define RF_AGCREF_AUTO_OFF 0x00
-
-#define RF_AGCREF_LEVEL_MINUS80 0x00 // Default
-#define RF_AGCREF_LEVEL_MINUS81 0x01
-#define RF_AGCREF_LEVEL_MINUS82 0x02
-#define RF_AGCREF_LEVEL_MINUS83 0x03
-#define RF_AGCREF_LEVEL_MINUS84 0x04
-#define RF_AGCREF_LEVEL_MINUS85 0x05
-#define RF_AGCREF_LEVEL_MINUS86 0x06
-#define RF_AGCREF_LEVEL_MINUS87 0x07
-#define RF_AGCREF_LEVEL_MINUS88 0x08
-#define RF_AGCREF_LEVEL_MINUS89 0x09
-#define RF_AGCREF_LEVEL_MINUS90 0x0A
-#define RF_AGCREF_LEVEL_MINUS91 0x0B
-#define RF_AGCREF_LEVEL_MINUS92 0x0C
-#define RF_AGCREF_LEVEL_MINUS93 0x0D
-#define RF_AGCREF_LEVEL_MINUS94 0x0E
-#define RF_AGCREF_LEVEL_MINUS95 0x0F
-#define RF_AGCREF_LEVEL_MINUS96 0x10
-#define RF_AGCREF_LEVEL_MINUS97 0x11
-#define RF_AGCREF_LEVEL_MINUS98 0x12
-#define RF_AGCREF_LEVEL_MINUS99 0x13
-#define RF_AGCREF_LEVEL_MINUS100 0x14
-#define RF_AGCREF_LEVEL_MINUS101 0x15
-#define RF_AGCREF_LEVEL_MINUS102 0x16
-#define RF_AGCREF_LEVEL_MINUS103 0x17
-#define RF_AGCREF_LEVEL_MINUS104 0x18
-#define RF_AGCREF_LEVEL_MINUS105 0x19
-#define RF_AGCREF_LEVEL_MINUS106 0x1A
-#define RF_AGCREF_LEVEL_MINUS107 0x1B
-#define RF_AGCREF_LEVEL_MINUS108 0x1C
-#define RF_AGCREF_LEVEL_MINUS109 0x1D
-#define RF_AGCREF_LEVEL_MINUS110 0x1E
-#define RF_AGCREF_LEVEL_MINUS111 0x1F
-#define RF_AGCREF_LEVEL_MINUS112 0x20
-#define RF_AGCREF_LEVEL_MINUS113 0x21
-#define RF_AGCREF_LEVEL_MINUS114 0x22
-#define RF_AGCREF_LEVEL_MINUS115 0x23
-#define RF_AGCREF_LEVEL_MINUS116 0x24
-#define RF_AGCREF_LEVEL_MINUS117 0x25
-#define RF_AGCREF_LEVEL_MINUS118 0x26
-#define RF_AGCREF_LEVEL_MINUS119 0x27
-#define RF_AGCREF_LEVEL_MINUS120 0x28
-#define RF_AGCREF_LEVEL_MINUS121 0x29
-#define RF_AGCREF_LEVEL_MINUS122 0x2A
-#define RF_AGCREF_LEVEL_MINUS123 0x2B
-#define RF_AGCREF_LEVEL_MINUS124 0x2C
-#define RF_AGCREF_LEVEL_MINUS125 0x2D
-#define RF_AGCREF_LEVEL_MINUS126 0x2E
-#define RF_AGCREF_LEVEL_MINUS127 0x2F
-#define RF_AGCREF_LEVEL_MINUS128 0x30
-#define RF_AGCREF_LEVEL_MINUS129 0x31
-#define RF_AGCREF_LEVEL_MINUS130 0x32
-#define RF_AGCREF_LEVEL_MINUS131 0x33
-#define RF_AGCREF_LEVEL_MINUS132 0x34
-#define RF_AGCREF_LEVEL_MINUS133 0x35
-#define RF_AGCREF_LEVEL_MINUS134 0x36
-#define RF_AGCREF_LEVEL_MINUS135 0x37
-#define RF_AGCREF_LEVEL_MINUS136 0x38
-#define RF_AGCREF_LEVEL_MINUS137 0x39
-#define RF_AGCREF_LEVEL_MINUS138 0x3A
-#define RF_AGCREF_LEVEL_MINUS139 0x3B
-#define RF_AGCREF_LEVEL_MINUS140 0x3C
-#define RF_AGCREF_LEVEL_MINUS141 0x3D
-#define RF_AGCREF_LEVEL_MINUS142 0x3E
-#define RF_AGCREF_LEVEL_MINUS143 0x3F
-
-
-// RegAgcThresh1 - not present on RFM69/SX1231
-#define RF_AGCTHRESH1_SNRMARGIN_000 0x00
-#define RF_AGCTHRESH1_SNRMARGIN_001 0x20
-#define RF_AGCTHRESH1_SNRMARGIN_010 0x40
-#define RF_AGCTHRESH1_SNRMARGIN_011 0x60
-#define RF_AGCTHRESH1_SNRMARGIN_100 0x80
-#define RF_AGCTHRESH1_SNRMARGIN_101 0xA0 // Default
-#define RF_AGCTHRESH1_SNRMARGIN_110 0xC0
-#define RF_AGCTHRESH1_SNRMARGIN_111 0xE0
-
-#define RF_AGCTHRESH1_STEP1_0 0x00
-#define RF_AGCTHRESH1_STEP1_1 0x01
-#define RF_AGCTHRESH1_STEP1_2 0x02
-#define RF_AGCTHRESH1_STEP1_3 0x03
-#define RF_AGCTHRESH1_STEP1_4 0x04
-#define RF_AGCTHRESH1_STEP1_5 0x05
-#define RF_AGCTHRESH1_STEP1_6 0x06
-#define RF_AGCTHRESH1_STEP1_7 0x07
-#define RF_AGCTHRESH1_STEP1_8 0x08
-#define RF_AGCTHRESH1_STEP1_9 0x09
-#define RF_AGCTHRESH1_STEP1_10 0x0A
-#define RF_AGCTHRESH1_STEP1_11 0x0B
-#define RF_AGCTHRESH1_STEP1_12 0x0C
-#define RF_AGCTHRESH1_STEP1_13 0x0D
-#define RF_AGCTHRESH1_STEP1_14 0x0E
-#define RF_AGCTHRESH1_STEP1_15 0x0F
-#define RF_AGCTHRESH1_STEP1_16 0x10 // Default
-#define RF_AGCTHRESH1_STEP1_17 0x11
-#define RF_AGCTHRESH1_STEP1_18 0x12
-#define RF_AGCTHRESH1_STEP1_19 0x13
-#define RF_AGCTHRESH1_STEP1_20 0x14
-#define RF_AGCTHRESH1_STEP1_21 0x15
-#define RF_AGCTHRESH1_STEP1_22 0x16
-#define RF_AGCTHRESH1_STEP1_23 0x17
-#define RF_AGCTHRESH1_STEP1_24 0x18
-#define RF_AGCTHRESH1_STEP1_25 0x19
-#define RF_AGCTHRESH1_STEP1_26 0x1A
-#define RF_AGCTHRESH1_STEP1_27 0x1B
-#define RF_AGCTHRESH1_STEP1_28 0x1C
-#define RF_AGCTHRESH1_STEP1_29 0x1D
-#define RF_AGCTHRESH1_STEP1_30 0x1E
-#define RF_AGCTHRESH1_STEP1_31 0x1F
-
-
-// RegAgcThresh2 - not present on RFM69/SX1231
-#define RF_AGCTHRESH2_STEP2_0 0x00
-#define RF_AGCTHRESH2_STEP2_1 0x10
-#define RF_AGCTHRESH2_STEP2_2 0x20
-#define RF_AGCTHRESH2_STEP2_3 0x30 // XXX wrong -- Default
-#define RF_AGCTHRESH2_STEP2_4 0x40
-#define RF_AGCTHRESH2_STEP2_5 0x50
-#define RF_AGCTHRESH2_STEP2_6 0x60
-#define RF_AGCTHRESH2_STEP2_7 0x70 // default
-#define RF_AGCTHRESH2_STEP2_8 0x80
-#define RF_AGCTHRESH2_STEP2_9 0x90
-#define RF_AGCTHRESH2_STEP2_10 0xA0
-#define RF_AGCTHRESH2_STEP2_11 0xB0
-#define RF_AGCTHRESH2_STEP2_12 0xC0
-#define RF_AGCTHRESH2_STEP2_13 0xD0
-#define RF_AGCTHRESH2_STEP2_14 0xE0
-#define RF_AGCTHRESH2_STEP2_15 0xF0
-
-#define RF_AGCTHRESH2_STEP3_0 0x00
-#define RF_AGCTHRESH2_STEP3_1 0x01
-#define RF_AGCTHRESH2_STEP3_2 0x02
-#define RF_AGCTHRESH2_STEP3_3 0x03
-#define RF_AGCTHRESH2_STEP3_4 0x04
-#define RF_AGCTHRESH2_STEP3_5 0x05
-#define RF_AGCTHRESH2_STEP3_6 0x06
-#define RF_AGCTHRESH2_STEP3_7 0x07
-#define RF_AGCTHRESH2_STEP3_8 0x08
-#define RF_AGCTHRESH2_STEP3_9 0x09
-#define RF_AGCTHRESH2_STEP3_10 0x0A
-#define RF_AGCTHRESH2_STEP3_11 0x0B // Default
-#define RF_AGCTHRESH2_STEP3_12 0x0C
-#define RF_AGCTHRESH2_STEP3_13 0x0D
-#define RF_AGCTHRESH2_STEP3_14 0x0E
-#define RF_AGCTHRESH2_STEP3_15 0x0F
-
-
-// RegAgcThresh3 - not present on RFM69/SX1231
-#define RF_AGCTHRESH3_STEP4_0 0x00
-#define RF_AGCTHRESH3_STEP4_1 0x10
-#define RF_AGCTHRESH3_STEP4_2 0x20
-#define RF_AGCTHRESH3_STEP4_3 0x30
-#define RF_AGCTHRESH3_STEP4_4 0x40
-#define RF_AGCTHRESH3_STEP4_5 0x50
-#define RF_AGCTHRESH3_STEP4_6 0x60
-#define RF_AGCTHRESH3_STEP4_7 0x70
-#define RF_AGCTHRESH3_STEP4_8 0x80
-#define RF_AGCTHRESH3_STEP4_9 0x90 // Default
-#define RF_AGCTHRESH3_STEP4_10 0xA0
-#define RF_AGCTHRESH3_STEP4_11 0xB0
-#define RF_AGCTHRESH3_STEP4_12 0xC0
-#define RF_AGCTHRESH3_STEP4_13 0xD0
-#define RF_AGCTHRESH3_STEP4_14 0xE0
-#define RF_AGCTHRESH3_STEP4_15 0xF0
-
-#define RF_AGCTHRESH3_STEP5_0 0x00
-#define RF_AGCTHRESH3_STEP5_1 0x01
-#define RF_AGCTHRESH3_STEP5_2 0x02
-#define RF_AGCTHRESH3_STEP5_3 0x03
-#define RF_AGCTHRESH3_STEP5_4 0x04
-#define RF_AGCTHRESH3_STEP5_5 0x05
-#define RF_AGCTHRESH3_STEP5_6 0x06
-#define RF_AGCTHRESH3_STEP5_7 0x07
-#define RF_AGCTHRES33_STEP5_8 0x08
-#define RF_AGCTHRESH3_STEP5_9 0x09
-#define RF_AGCTHRESH3_STEP5_10 0x0A
-#define RF_AGCTHRESH3_STEP5_11 0x0B // Default
-#define RF_AGCTHRESH3_STEP5_12 0x0C
-#define RF_AGCTHRESH3_STEP5_13 0x0D
-#define RF_AGCTHRESH3_STEP5_14 0x0E
-#define RF_AGCTHRESH3_STEP5_15 0x0F
-
-
-// RegLna
-#define RF_LNA_ZIN_50 0x00 // Reset value
-#define RF_LNA_ZIN_200 0x80 // Recommended default
-
-#define RF_LNA_LOWPOWER_OFF 0x00 // Default
-#define RF_LNA_LOWPOWER_ON 0x40
-
-#define RF_LNA_CURRENTGAIN 0x08
-
-#define RF_LNA_GAINSELECT_AUTO 0x00 // Default
-#define RF_LNA_GAINSELECT_MAX 0x01
-#define RF_LNA_GAINSELECT_MAXMINUS6 0x02
-#define RF_LNA_GAINSELECT_MAXMINUS12 0x03
-#define RF_LNA_GAINSELECT_MAXMINUS24 0x04
-#define RF_LNA_GAINSELECT_MAXMINUS36 0x05
-#define RF_LNA_GAINSELECT_MAXMINUS48 0x06
-
-
-// RegRxBw
-#define RF_RXBW_DCCFREQ_000 0x00
-#define RF_RXBW_DCCFREQ_001 0x20
-#define RF_RXBW_DCCFREQ_010 0x40 // Recommended default
-#define RF_RXBW_DCCFREQ_011 0x60
-#define RF_RXBW_DCCFREQ_100 0x80 // Reset value
-#define RF_RXBW_DCCFREQ_101 0xA0
-#define RF_RXBW_DCCFREQ_110 0xC0
-#define RF_RXBW_DCCFREQ_111 0xE0
-
-#define RF_RXBW_MANT_16 0x00 // Reset value
-#define RF_RXBW_MANT_20 0x08
-#define RF_RXBW_MANT_24 0x10 // Recommended default
-
-#define RF_RXBW_EXP_0 0x00
-#define RF_RXBW_EXP_1 0x01
-#define RF_RXBW_EXP_2 0x02
-#define RF_RXBW_EXP_3 0x03
-#define RF_RXBW_EXP_4 0x04
-#define RF_RXBW_EXP_5 0x05 // Recommended default
-#define RF_RXBW_EXP_6 0x06 // Reset value
-#define RF_RXBW_EXP_7 0x07
-
-
-// RegAfcBw
-#define RF_AFCBW_DCCFREQAFC_000 0x00
-#define RF_AFCBW_DCCFREQAFC_001 0x20
-#define RF_AFCBW_DCCFREQAFC_010 0x40
-#define RF_AFCBW_DCCFREQAFC_011 0x60
-#define RF_AFCBW_DCCFREQAFC_100 0x80 // Default
-#define RF_AFCBW_DCCFREQAFC_101 0xA0
-#define RF_AFCBW_DCCFREQAFC_110 0xC0
-#define RF_AFCBW_DCCFREQAFC_111 0xE0
-
-#define RF_AFCBW_MANTAFC_16 0x00
-#define RF_AFCBW_MANTAFC_20 0x08 // Default
-#define RF_AFCBW_MANTAFC_24 0x10
-
-#define RF_AFCBW_EXPAFC_0 0x00
-#define RF_AFCBW_EXPAFC_1 0x01
-#define RF_AFCBW_EXPAFC_2 0x02 // Reset value
-#define RF_AFCBW_EXPAFC_3 0x03 // Recommended default
-#define RF_AFCBW_EXPAFC_4 0x04
-#define RF_AFCBW_EXPAFC_5 0x05
-#define RF_AFCBW_EXPAFC_6 0x06
-#define RF_AFCBW_EXPAFC_7 0x07
-
-
-// RegOokPeak
-#define RF_OOKPEAK_THRESHTYPE_FIXED 0x00
-#define RF_OOKPEAK_THRESHTYPE_PEAK 0x40 // Default
-#define RF_OOKPEAK_THRESHTYPE_AVERAGE 0x80
-
-#define RF_OOKPEAK_PEAKTHRESHSTEP_000 0x00 // Default
-#define RF_OOKPEAK_PEAKTHRESHSTEP_001 0x08
-#define RF_OOKPEAK_PEAKTHRESHSTEP_010 0x10
-#define RF_OOKPEAK_PEAKTHRESHSTEP_011 0x18
-#define RF_OOKPEAK_PEAKTHRESHSTEP_100 0x20
-#define RF_OOKPEAK_PEAKTHRESHSTEP_101 0x28
-#define RF_OOKPEAK_PEAKTHRESHSTEP_110 0x30
-#define RF_OOKPEAK_PEAKTHRESHSTEP_111 0x38
-
-#define RF_OOKPEAK_PEAKTHRESHDEC_000 0x00 // Default
-#define RF_OOKPEAK_PEAKTHRESHDEC_001 0x01
-#define RF_OOKPEAK_PEAKTHRESHDEC_010 0x02
-#define RF_OOKPEAK_PEAKTHRESHDEC_011 0x03
-#define RF_OOKPEAK_PEAKTHRESHDEC_100 0x04
-#define RF_OOKPEAK_PEAKTHRESHDEC_101 0x05
-#define RF_OOKPEAK_PEAKTHRESHDEC_110 0x06
-#define RF_OOKPEAK_PEAKTHRESHDEC_111 0x07
-
-
-// RegOokAvg
-#define RF_OOKAVG_AVERAGETHRESHFILT_00 0x00
-#define RF_OOKAVG_AVERAGETHRESHFILT_01 0x40
-#define RF_OOKAVG_AVERAGETHRESHFILT_10 0x80 // Default
-#define RF_OOKAVG_AVERAGETHRESHFILT_11 0xC0
-
-
-// RegOokFix
-#define RF_OOKFIX_FIXEDTHRESH_VALUE 0x06 // Default
-
-
-// RegAfcFei
-#define RF_AFCFEI_FEI_DONE 0x40
-#define RF_AFCFEI_FEI_START 0x20
-#define RF_AFCFEI_AFC_DONE 0x10
-#define RF_AFCFEI_AFCAUTOCLEAR_ON 0x08
-#define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default
-
-#define RF_AFCFEI_AFCAUTO_ON 0x04
-#define RF_AFCFEI_AFCAUTO_OFF 0x00 // Default
-
-#define RF_AFCFEI_AFC_CLEAR 0x02
-#define RF_AFCFEI_AFC_START 0x01
-
-
-// RegRssiConfig
-#define RF_RSSI_FASTRX_ON 0x08 // not present on RFM69/SX1231
-#define RF_RSSI_FASTRX_OFF 0x00 // Default
-
-#define RF_RSSI_DONE 0x02
-#define RF_RSSI_START 0x01
-
-
-// RegDioMapping1
-#define RF_DIOMAPPING1_DIO0_00 0x00 // Default
-#define RF_DIOMAPPING1_DIO0_01 0x40
-#define RF_DIOMAPPING1_DIO0_10 0x80
-#define RF_DIOMAPPING1_DIO0_11 0xC0
-
-#define RF_DIOMAPPING1_DIO1_00 0x00 // Default
-#define RF_DIOMAPPING1_DIO1_01 0x10
-#define RF_DIOMAPPING1_DIO1_10 0x20
-#define RF_DIOMAPPING1_DIO1_11 0x30
-
-#define RF_DIOMAPPING1_DIO2_00 0x00 // Default
-#define RF_DIOMAPPING1_DIO2_01 0x04
-#define RF_DIOMAPPING1_DIO2_10 0x08
-#define RF_DIOMAPPING1_DIO2_11 0x0C
-
-#define RF_DIOMAPPING1_DIO3_00 0x00 // Default
-#define RF_DIOMAPPING1_DIO3_01 0x01
-#define RF_DIOMAPPING1_DIO3_10 0x02
-#define RF_DIOMAPPING1_DIO3_11 0x03
-
-
-// RegDioMapping2
-#define RF_DIOMAPPING2_DIO4_00 0x00 // Default
-#define RF_DIOMAPPING2_DIO4_01 0x40
-#define RF_DIOMAPPING2_DIO4_10 0x80
-#define RF_DIOMAPPING2_DIO4_11 0xC0
-
-#define RF_DIOMAPPING2_DIO5_00 0x00 // Default
-#define RF_DIOMAPPING2_DIO5_01 0x10
-#define RF_DIOMAPPING2_DIO5_10 0x20
-#define RF_DIOMAPPING2_DIO5_11 0x30
-
-#define RF_DIOMAPPING2_CLKOUT_32 0x00
-#define RF_DIOMAPPING2_CLKOUT_16 0x01
-#define RF_DIOMAPPING2_CLKOUT_8 0x02
-#define RF_DIOMAPPING2_CLKOUT_4 0x03
-#define RF_DIOMAPPING2_CLKOUT_2 0x04
-#define RF_DIOMAPPING2_CLKOUT_1 0x05 // Reset value
-#define RF_DIOMAPPING2_CLKOUT_RC 0x06
-#define RF_DIOMAPPING2_CLKOUT_OFF 0x07 // Recommended default
-
-
-// RegIrqFlags1
-#define RF_IRQFLAGS1_MODEREADY 0x80
-#define RF_IRQFLAGS1_RXREADY 0x40
-#define RF_IRQFLAGS1_TXREADY 0x20
-#define RF_IRQFLAGS1_PLLLOCK 0x10
-#define RF_IRQFLAGS1_RSSI 0x08
-#define RF_IRQFLAGS1_TIMEOUT 0x04
-#define RF_IRQFLAGS1_AUTOMODE 0x02
-#define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01
-
-
-// RegIrqFlags2
-#define RF_IRQFLAGS2_FIFOFULL 0x80
-#define RF_IRQFLAGS2_FIFONOTEMPTY 0x40
-#define RF_IRQFLAGS2_FIFOLEVEL 0x20
-#define RF_IRQFLAGS2_FIFOOVERRUN 0x10
-#define RF_IRQFLAGS2_PACKETSENT 0x08
-#define RF_IRQFLAGS2_PAYLOADREADY 0x04
-#define RF_IRQFLAGS2_CRCOK 0x02
-#define RF_IRQFLAGS2_LOWBAT 0x01 // not present on RFM69/SX1231
-
-
-// RegRssiThresh
-#define RF_RSSITHRESH_VALUE 0xE4 // Default
-
-
-// RegRxTimeout1
-#define RF_RXTIMEOUT1_RXSTART_VALUE 0x00 // Default
-
-
-// RegRxTimeout2
-#define RF_RXTIMEOUT2_RSSITHRESH_VALUE 0x00 // Default
-
-
-// RegPreamble
-#define RF_PREAMBLESIZE_MSB_VALUE 0x00 // Default
-#define RF_PREAMBLESIZE_LSB_VALUE 0x03 // Default
-
-
-// RegSyncConfig
-#define RF_SYNC_ON 0x80 // Default
-#define RF_SYNC_OFF 0x00
-
-#define RF_SYNC_FIFOFILL_AUTO 0x00 // Default -- when sync interrupt occurs
-#define RF_SYNC_FIFOFILL_MANUAL 0x40
-
-#define RF_SYNC_SIZE_1 0x00
-#define RF_SYNC_SIZE_2 0x08
-#define RF_SYNC_SIZE_3 0x10
-#define RF_SYNC_SIZE_4 0x18 // Default
-#define RF_SYNC_SIZE_5 0x20
-#define RF_SYNC_SIZE_6 0x28
-#define RF_SYNC_SIZE_7 0x30
-#define RF_SYNC_SIZE_8 0x38
-
-#define RF_SYNC_TOL_0 0x00 // Default
-#define RF_SYNC_TOL_1 0x01
-#define RF_SYNC_TOL_2 0x02
-#define RF_SYNC_TOL_3 0x03
-#define RF_SYNC_TOL_4 0x04
-#define RF_SYNC_TOL_5 0x05
-#define RF_SYNC_TOL_6 0x06
-#define RF_SYNC_TOL_7 0x07
-
-
-// RegSyncValue1-8
-#define RF_SYNC_BYTE1_VALUE 0x00 // Default
-#define RF_SYNC_BYTE2_VALUE 0x00 // Default
-#define RF_SYNC_BYTE3_VALUE 0x00 // Default
-#define RF_SYNC_BYTE4_VALUE 0x00 // Default
-#define RF_SYNC_BYTE5_VALUE 0x00 // Default
-#define RF_SYNC_BYTE6_VALUE 0x00 // Default
-#define RF_SYNC_BYTE7_VALUE 0x00 // Default
-#define RF_SYNC_BYTE8_VALUE 0x00 // Default
-
-
-// RegPacketConfig1
-#define RF_PACKET1_FORMAT_FIXED 0x00 // Default
-#define RF_PACKET1_FORMAT_VARIABLE 0x80
-
-#define RF_PACKET1_DCFREE_OFF 0x00 // Default
-#define RF_PACKET1_DCFREE_MANCHESTER 0x20
-#define RF_PACKET1_DCFREE_WHITENING 0x40
-
-#define RF_PACKET1_CRC_ON 0x10 // Default
-#define RF_PACKET1_CRC_OFF 0x00
-
-#define RF_PACKET1_CRCAUTOCLEAR_ON 0x00 // Default
-#define RF_PACKET1_CRCAUTOCLEAR_OFF 0x08
-
-#define RF_PACKET1_ADRSFILTERING_OFF 0x00 // Default
-#define RF_PACKET1_ADRSFILTERING_NODE 0x02
-#define RF_PACKET1_ADRSFILTERING_NODEBROADCAST 0x04
-
-
-// RegPayloadLength
-#define RF_PAYLOADLENGTH_VALUE 0x40 // Default
-
-
-// RegBroadcastAdrs
-#define RF_BROADCASTADDRESS_VALUE 0x00
-
-
-// RegAutoModes
-#define RF_AUTOMODES_ENTER_OFF 0x00 // Default
-#define RF_AUTOMODES_ENTER_FIFONOTEMPTY 0x20
-#define RF_AUTOMODES_ENTER_FIFOLEVEL 0x40
-#define RF_AUTOMODES_ENTER_CRCOK 0x60
-#define RF_AUTOMODES_ENTER_PAYLOADREADY 0x80
-#define RF_AUTOMODES_ENTER_SYNCADRSMATCH 0xA0
-#define RF_AUTOMODES_ENTER_PACKETSENT 0xC0
-#define RF_AUTOMODES_ENTER_FIFOEMPTY 0xE0
-
-#define RF_AUTOMODES_EXIT_OFF 0x00 // Default
-#define RF_AUTOMODES_EXIT_FIFOEMPTY 0x04
-#define RF_AUTOMODES_EXIT_FIFOLEVEL 0x08
-#define RF_AUTOMODES_EXIT_CRCOK 0x0C
-#define RF_AUTOMODES_EXIT_PAYLOADREADY 0x10
-#define RF_AUTOMODES_EXIT_SYNCADRSMATCH 0x14
-#define RF_AUTOMODES_EXIT_PACKETSENT 0x18
-#define RF_AUTOMODES_EXIT_RXTIMEOUT 0x1C
-
-#define RF_AUTOMODES_INTERMEDIATE_SLEEP 0x00 // Default
-#define RF_AUTOMODES_INTERMEDIATE_STANDBY 0x01
-#define RF_AUTOMODES_INTERMEDIATE_RECEIVER 0x02
-#define RF_AUTOMODES_INTERMEDIATE_TRANSMITTER 0x03
-
-
-// RegFifoThresh
-#define RF_FIFOTHRESH_TXSTART_FIFOTHRESH 0x00 // Reset value
-#define RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY 0x80 // Recommended default
-
-#define RF_FIFOTHRESH_VALUE 0x0F // Default
-
-
-// RegPacketConfig2
-#define RF_PACKET2_RXRESTARTDELAY_1BIT 0x00 // Default
-#define RF_PACKET2_RXRESTARTDELAY_2BITS 0x10
-#define RF_PACKET2_RXRESTARTDELAY_4BITS 0x20
-#define RF_PACKET2_RXRESTARTDELAY_8BITS 0x30
-#define RF_PACKET2_RXRESTARTDELAY_16BITS 0x40
-#define RF_PACKET2_RXRESTARTDELAY_32BITS 0x50
-#define RF_PACKET2_RXRESTARTDELAY_64BITS 0x60
-#define RF_PACKET2_RXRESTARTDELAY_128BITS 0x70
-#define RF_PACKET2_RXRESTARTDELAY_256BITS 0x80
-#define RF_PACKET2_RXRESTARTDELAY_512BITS 0x90
-#define RF_PACKET2_RXRESTARTDELAY_1024BITS 0xA0
-#define RF_PACKET2_RXRESTARTDELAY_2048BITS 0xB0
-#define RF_PACKET2_RXRESTARTDELAY_NONE 0xC0
-#define RF_PACKET2_RXRESTART 0x04
-
-#define RF_PACKET2_AUTORXRESTART_ON 0x02 // Default
-#define RF_PACKET2_AUTORXRESTART_OFF 0x00
-
-#define RF_PACKET2_AES_ON 0x01
-#define RF_PACKET2_AES_OFF 0x00 // Default
-
-
-// RegAesKey1-16
-#define RF_AESKEY1_VALUE 0x00 // Default
-#define RF_AESKEY2_VALUE 0x00 // Default
-#define RF_AESKEY3_VALUE 0x00 // Default
-#define RF_AESKEY4_VALUE 0x00 // Default
-#define RF_AESKEY5_VALUE 0x00 // Default
-#define RF_AESKEY6_VALUE 0x00 // Default
-#define RF_AESKEY7_VALUE 0x00 // Default
-#define RF_AESKEY8_VALUE 0x00 // Default
-#define RF_AESKEY9_VALUE 0x00 // Default
-#define RF_AESKEY10_VALUE 0x00 // Default
-#define RF_AESKEY11_VALUE 0x00 // Default
-#define RF_AESKEY12_VALUE 0x00 // Default
-#define RF_AESKEY13_VALUE 0x00 // Default
-#define RF_AESKEY14_VALUE 0x00 // Default
-#define RF_AESKEY15_VALUE 0x00 // Default
-#define RF_AESKEY16_VALUE 0x00 // Default
-
-
-// RegTemp1
-#define RF_TEMP1_MEAS_START 0x08
-#define RF_TEMP1_MEAS_RUNNING 0x04
-// not present on RFM69/SX1231
-#define RF_TEMP1_ADCLOWPOWER_ON 0x01 // Default
-#define RF_TEMP1_ADCLOWPOWER_OFF 0x00
-
-
-// RegTestLna
-#define RF_TESTLNA_NORMAL 0x1B
-#define RF_TESTLNA_HIGH_SENSITIVITY 0x2D
-
-
-// RegTestDagc
-#define RF_DAGC_NORMAL 0x00 // Reset value
-#define RF_DAGC_IMPROVED_LOWBETA1 0x20
-#define RF_DAGC_IMPROVED_LOWBETA0 0x30 // Recommended default
diff --git a/laser-tag software/aha_v2.im1 b/laser-tag software/aha_v2.im1
new file mode 100644
index 0000000..7b87657
--- /dev/null
+++ b/laser-tag software/aha_v2.im1
Binary files differ
diff --git a/laser-tag software/build_all.sh b/laser-tag software/build_all.sh
index 0958334..ed4df35 100755
--- a/laser-tag software/build_all.sh
+++ b/laser-tag software/build_all.sh
@@ -1,5 +1,5 @@
#!/bin/sh
-cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug .
+cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug "$@" .
make -j4
-cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release .
+cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release "$@" .
make -j4
diff --git a/laser-tag software/build_debug.sh b/laser-tag software/build_debug.sh
index fe5c3e6..e5f476b 100755
--- a/laser-tag software/build_debug.sh
+++ b/laser-tag software/build_debug.sh
@@ -1,3 +1,3 @@
#!/bin/sh
-cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug .
+cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug "$@" .
make -j4
diff --git a/laser-tag software/build_release.sh b/laser-tag software/build_release.sh
index 25eea88..a623b3e 100755
--- a/laser-tag software/build_release.sh
+++ b/laser-tag software/build_release.sh
@@ -1,3 +1,3 @@
#!/bin/sh
-cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release .
+cmake -DCMAKE_TOOLCHAIN_FILE="../KSDK_1.2.0/tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release "$@" .
make -j4
diff --git a/laser-tag software/defcon31.im1 b/laser-tag software/defcon31.im1
new file mode 100644
index 0000000..1fac8e0
--- /dev/null
+++ b/laser-tag software/defcon31.im1
Binary files differ
diff --git a/laser-tag software/disk.c b/laser-tag software/disk.c
index ce0ddc9..8493639 100644
--- a/laser-tag software/disk.c
+++ b/laser-tag software/disk.c
@@ -66,13 +66,10 @@
****************************************************************************/
/* Add all the variables needed for disk.c to this structure */
extern usb_desc_request_notify_struct_t desc_callback;
-usb_application_callback_struct_t msc_application_callback;
-usb_vendor_req_callback_struct_t vend_req_callback;
-usb_class_specific_callback_struct_t class_specific_callback;
msc_config_struct_t g_msd_config;
disk_struct_t g_disk;
-uint8_t sector_buffer[MSD_RECV_BUFFER_SIZE];
+uint8_t sector_buffer[LENGTH_OF_EACH_LAB];
/*****************************************************************************
* Local Types - None
@@ -115,7 +112,6 @@ void USB_App_Device_Callback(uint8_t event_type, void* val, void* arg)
{
if (event_type == USB_DEV_EVENT_BUS_RESET)
{
- g_disk.start_app = FALSE;
if (USB_OK == USB_Class_MSC_Get_Speed(g_disk.app_handle, &g_disk.speed))
{
USB_Desc_Set_Speed(g_disk.app_handle, g_disk.speed);
@@ -123,7 +119,6 @@ void USB_App_Device_Callback(uint8_t event_type, void* val, void* arg)
}
else if (event_type == USB_DEV_EVENT_ENUM_COMPLETE)
{
- g_disk.start_app = TRUE;
}
else if (event_type == USB_DEV_EVENT_ERROR)
{
@@ -140,7 +135,7 @@ void USB_App_Device_Callback(uint8_t event_type, void* val, void* arg)
{
if (NULL != val)
{
- *((uint32_t *)val) = (uint32_t)DISK_SIZE_NORMAL;
+ *((uint32_t *)val) = (uint32_t)sizeof(sector_buffer);
}
}
@@ -169,22 +164,19 @@ uint8_t USB_App_Class_Callback
)
{
lba_app_struct_t* lba_data_ptr;
- uint8_t * prevent_removal_ptr;
device_lba_info_struct_t* device_lba_info_ptr;
uint8_t error = USB_OK;
- if (g_disk.read_write_error)
- {
- return USBERR_ERROR;
- }
-
switch(event_type)
{
case USB_DEV_EVENT_DATA_RECEIVED:
lba_data_ptr = (lba_app_struct_t*) size;
- flash_write((intptr_t)images[lba_data_ptr->lun] + lba_data_ptr->offset,
- sector_buffer,
- MSD_RECV_BUFFER_SIZE);
+ debug_printf("USB_DEV_EVENT_DATA_RECEIVED lun %u size %u offset 0x%08x\r\n",
+ lba_data_ptr->lun, lba_data_ptr->size, lba_data_ptr->offset);
+ flash_write_sector((intptr_t)images[lba_data_ptr->lun] + lba_data_ptr->offset,
+ sector_buffer);
+ debug_printf("finished flash write\r\n");
+ g_disk.writing = FALSE;
break;
case USB_DEV_EVENT_SEND_COMPLETE:
lba_data_ptr = (lba_app_struct_t*) size;
@@ -196,29 +188,36 @@ uint8_t USB_App_Class_Callback
if(data != NULL)
{
+ debug_printf("USB_MSC_DEVICE_READ_REQUEST lun %u size %u offset 0x%08x\r\n",
+ lba_data_ptr->lun, lba_data_ptr->size, lba_data_ptr->offset);
*data = images[lba_data_ptr->lun] + lba_data_ptr->offset;
}
break;
case USB_MSC_DEVICE_WRITE_REQUEST:
lba_data_ptr = (lba_app_struct_t*) size;
- if(data != NULL)
- {
- *data = sector_buffer;
+ if(data != NULL) {
+ if (g_disk.writing) {
+ debug_printf("USB_MSC_DEVICE_WRITE_REQUEST busy\r\n");
+ *data = NULL;
+ // this is ignored!
+ //error = USBERR_ENDPOINT_STALLED;
+ } else if (lba_data_ptr->size > sizeof(sector_buffer)) {
+ debug_printf("USB_MSC_DEVICE_WRITE_REQUEST too big %u > %u\r\n",
+ lba_data_ptr->size, sizeof(sector_buffer));
+ *data = NULL;
+ } else {
+ debug_printf("USB_MSC_DEVICE_WRITE_REQUEST size %u offset 0x%08x\r\n",
+ lba_data_ptr->size, lba_data_ptr->offset);
+ g_disk.writing = TRUE;
+ *data = sector_buffer;
+ }
+ } else {
+ debug_printf("USB_MSC_DEVICE_WRITE_REQUEST no data\r\n");
}
break;
case USB_MSC_DEVICE_FORMAT_COMPLETE:
break;
case USB_MSC_DEVICE_REMOVAL_REQUEST:
- prevent_removal_ptr = (uint8_t *) size;
- if (SUPPORT_DISK_LOCKING_MECHANISM)
- {
- g_disk.disk_lock = *prevent_removal_ptr;
- }
- else if ((!SUPPORT_DISK_LOCKING_MECHANISM) && (!(*prevent_removal_ptr)))
- {
- /*there is no support for disk locking and removal of medium is enabled*/
- /* code to be added here for this condition, if required */
- }
break;
case USB_MSC_DEVICE_GET_INFO:
device_lba_info_ptr = (device_lba_info_struct_t*) size;
@@ -251,12 +250,9 @@ void disk_init()
OS_Mem_zero(&g_msd_config, sizeof(msc_config_struct_t));
- msc_application_callback.callback = USB_App_Device_Callback;
- msc_application_callback.arg = &g_disk.app_handle;
-
/* Register the callbacks to lower layers */
- g_msd_config.msc_application_callback = msc_application_callback;
- g_msd_config.vendor_req_callback = vend_req_callback;
+ g_msd_config.msc_application_callback.callback = USB_App_Device_Callback;
+ g_msd_config.msc_application_callback.arg = &g_disk.app_handle;
g_msd_config.class_specific_callback.callback = USB_App_Class_Callback;
g_msd_config.class_specific_callback.arg = &g_disk.app_handle;
g_msd_config.desc_callback_ptr = &desc_callback;
diff --git a/laser-tag software/disk.h b/laser-tag software/disk.h
index 8d87896..32c21c2 100644
--- a/laser-tag software/disk.h
+++ b/laser-tag software/disk.h
@@ -48,9 +48,9 @@
#define SD_CARD_APP (0)
/* Length of Each Logical Address Block */
-#define LENGTH_OF_EACH_LAB (512)
+#define LENGTH_OF_EACH_LAB (1024) // 1k to align with flash
/* total number of logical blocks present */
-#define TOTAL_LOGICAL_ADDRESS_BLOCKS_NORMAL (8)
+#define TOTAL_LOGICAL_ADDRESS_BLOCKS_NORMAL (6) // 6k to fit board v2 images
/* Net Disk Size */
#define DISK_SIZE_NORMAL (TOTAL_LOGICAL_ADDRESS_BLOCKS_NORMAL * LENGTH_OF_EACH_LAB)
@@ -58,9 +58,6 @@
#define SUPPORT_DISK_LOCKING_MECHANISM (0) /*1: TRUE; 0:FALSE*/
-#define MSD_RECV_BUFFER_NUM (1)
-#define MSD_RECV_BUFFER_SIZE (512)
-#define MSD_SEND_BUFFER_SIZE (512)
/*****************************************************************************
* Global variables
*****************************************************************************/
@@ -71,11 +68,8 @@
typedef struct _disk_variable_struct
{
msd_handle_t app_handle;
- uint32_t start_app;
uint16_t speed;
- uint8_t *storage_disk;
- uint8_t disk_lock;
- uint8_t read_write_error;
+ bool writing;
} disk_struct_t;
/*****************************************************************************
diff --git a/laser-tag software/epaper.c b/laser-tag software/epaper.c
index 7d0effd..9ddbbfe 100644
--- a/laser-tag software/epaper.c
+++ b/laser-tag software/epaper.c
@@ -1,4 +1,5 @@
#include "epaper.h"
+#include "lptmr.h"
#include "fsl_debug_console.h"
#include "fsl_gpio_driver.h"
#include "fsl_spi_master_driver.h"
@@ -10,43 +11,66 @@ typedef enum { /* Image pixel -> Display pixel */
EPD_normal /* B -> B, W -> W (New Image) */
} EPD_stage;
-static const gpio_output_pin_user_config_t pinDischarge = {
- .pinName = GPIO_MAKE_PIN(GPIOA_IDX, 19),
+#ifdef BADGE_V2
+static const gpio_output_pin_user_config_t pinBorder = {
+ .pinName = GPIO_MAKE_PIN(GPIOD_IDX, 7),
.config.outputLogic = 0,
};
+static const gpio_output_pin_user_config_t pinReset = {
+ .pinName = GPIO_MAKE_PIN(GPIOA_IDX, 1),
+ .config.outputLogic = 0,
+};
+#endif
+
static const gpio_output_pin_user_config_t pinCS = {
+#ifdef BADGE_V1
.pinName = GPIO_MAKE_PIN(GPIOD_IDX, 4),
+#else
+ .pinName = GPIO_MAKE_PIN(GPIOD_IDX, 0),
+#endif
.config.outputLogic = 1,
};
static const spi_master_user_config_t spiConfig = {
- .bitsPerSec = 20000000, /* max is 20 MHz */
+ .bitsPerSec = 20000000, /* max G2 COG supports is 20 MHz */
.polarity = kSpiClockPolarity_ActiveHigh,
.phase = kSpiClockPhase_FirstEdge,
.direction = kSpiMsbFirst,
.bitCount = kSpi8BitMode,
};
+static const int LINES_PER_DISPLAY = EPD_H;
+static const int BYTES_PER_SCAN = EPD_H / 4 / 2;
+static const int BYTES_PER_LINE = EPD_W / 8;
+
+#ifdef BADGE_V1
static const uint8_t channel_select[] = {
0x00, 0x00, 0x1f, 0xe0, 0x00, 0x00, 0x00, 0xff
};
-
-static const int LINES_PER_DISPLAY = 128;
-static const int BYTES_PER_SCAN = 128 / 4 / 2;
-static const int BYTES_PER_LINE = 232 / 8;
+static const int SPI_UNIT = 1;
+#else
+static const uint8_t channel_select[] = {
+ 0x00, 0x00, 0x00, 0x7f, 0xff, 0xfe, 0x00, 0x00
+};
+static const int SPI_UNIT = 0;
+#endif
static spi_master_state_t spiState;
void EPD_Init()
{
- PORT_HAL_SetMuxMode(g_portBase[GPIOA_IDX], 19, kPortMuxAsGpio);
- PORT_HAL_SetMuxMode(g_portBase[GPIOA_IDX], 20, kPortMuxAsGpio);
- PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 4, kPortMuxAsGpio);
+#ifdef BADGE_V1
PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 5, kPortMuxAlt2);
PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 6, kPortMuxAlt2);
PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 7, kPortMuxAlt2);
- GPIO_DRV_OutputPinInit(&pinDischarge);
+#else
+ PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 1, kPortMuxAlt2);
+ PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 2, kPortMuxAlt2);
+ PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 3, kPortMuxAlt2);
+ GPIO_DRV_OutputPinInit(&pinBorder);
+ GPIO_DRV_OutputPinInit(&pinReset);
+#endif
GPIO_DRV_OutputPinInit(&pinCS);
}
@@ -54,13 +78,13 @@ static spi_status_t SPI_Transfer(const uint8_t *tx, uint8_t *rx, size_t count)
{
spi_status_t rc;
- rc = SPI_DRV_MasterTransfer(1, NULL, tx, rx, count);
+ rc = SPI_DRV_MasterTransfer(SPI_UNIT, NULL, tx, rx, count);
if (rc != kStatus_SPI_Success) {
return rc;
}
int i, timeout = count * 4;
for (i = 0; i < timeout; ++i) {
- rc = SPI_DRV_MasterGetTransferStatus(1, NULL);
+ rc = SPI_DRV_MasterGetTransferStatus(SPI_UNIT, NULL);
if (rc == kStatus_SPI_Success) {
return rc;
}
@@ -114,11 +138,7 @@ static uint8_t EPD_ReadCogID()
static void EPD_Delay(uint32_t ms)
{
- for (; ms > 0; --ms) {
- /* XXX This is really stupid */
- volatile int i;
- for (i = 0; i < 306 * 12; ++i);
- }
+ delay_ms(ms);
}
static void EPD_line(int line, const uint8_t *data, uint8_t fixed_value,
@@ -127,6 +147,7 @@ static void EPD_line(int line, const uint8_t *data, uint8_t fixed_value,
size_t len = BYTES_PER_SCAN * 2 + BYTES_PER_LINE * 2 + 1;
uint8_t buf[len], *p = buf;
int i;
+#ifdef BADGE_V1
for (i = 0; i < BYTES_PER_SCAN; ++i) {
if (0 != (line & 0x01) && line / 8 == i) {
*p++ = 0xc0 >> (line & 0x06);
@@ -178,6 +199,75 @@ static void EPD_line(int line, const uint8_t *data, uint8_t fixed_value,
} else {
*p++ = 0x00;
}
+#else
+ /* zero byte */
+ *p++ = 0;
+
+ /* "Odd" pixels counting down */
+ for (i = BYTES_PER_LINE; i > 0; --i) {
+ if (data) {
+ /* i is off-by-one to match datasheet's 1-based counting */
+ uint8_t pixels = data[i - 1];
+ /* Take even pixels (1-based counting again) */
+ pixels = pixels & 0x55;
+ switch (stage) {
+ case EPD_compensate:
+ pixels = 0xaa | (pixels ^ 0x55);
+ break;
+ case EPD_white:
+ pixels = 0x55 + (pixels ^ 0x55);
+ break;
+ case EPD_inverse:
+ pixels = 0x55 | ((pixels ^ 0x55) << 1);
+ break;
+ case EPD_normal:
+ pixels = 0xaa | pixels;
+ break;
+ }
+ *p++ = pixels;
+ } else {
+ *p++ = fixed_value;
+ }
+ }
+
+ /* All scanlines counting down */
+ for (i = BYTES_PER_SCAN * 2; i > 0; --i) {
+ if (line / 4 == i - 1) {
+ *p++ = 0x03 << ((line & 0x03) * 2);
+ } else {
+ *p++ = 0x00;
+ }
+ }
+
+ /* "Even" pixels counting up */
+ for (i = 1; i <= BYTES_PER_LINE; ++i) {
+ if (data) {
+ /* i is off-by-one to match datasheet's 1-based counting */
+ uint8_t pixels = data[i - 1];
+ /* Take odd pixels in reverse order (yes odd) */
+ pixels = (pixels & 0xaa) >> 1;
+ pixels = ((pixels & 0xcc) >> 2) | ((pixels & 0x33) << 2);
+ pixels = ((pixels & 0xf0) >> 4) | ((pixels & 0x0f) << 4);
+ switch (stage) {
+ case EPD_compensate:
+ pixels = 0xaa | (pixels ^ 0x55);
+ break;
+ case EPD_white:
+ pixels = 0x55 + (pixels ^ 0x55);
+ break;
+ case EPD_inverse:
+ pixels = 0x55 | ((pixels ^ 0x55) << 1);
+ break;
+ case EPD_normal:
+ pixels = 0xaa | pixels;
+ break;
+ }
+ *p++ = pixels;
+ } else {
+ *p++ = fixed_value;
+ }
+ }
+#endif
EPD_WriteCommandBuffer(0x0a, buf, len);
@@ -202,11 +292,11 @@ static void EPD_frame(const uint8_t *data, uint8_t fixed_value, EPD_stage stage)
static void EPD_frame_repeat(const uint8_t *data, uint8_t fixed_value,
EPD_stage stage)
{
- /* TODO this needs to repeat for about 630ms */
- int i;
- for (i = 0; i < 6; ++i) {
+ /* this needs to repeat for about 630ms */
+ uint32_t until = get_ms() + 630;
+ do {
EPD_frame(data, fixed_value, stage);
- }
+ } while (get_ms() < until);
}
int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
@@ -214,11 +304,24 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
int rc = 0;
/* Configure SPI1 */
- SPI_DRV_MasterInit(1, &spiState);
+ SPI_DRV_MasterInit(SPI_UNIT, &spiState);
uint32_t calculatedBaudRate;
- SPI_DRV_MasterConfigureBus(1, &spiConfig, &calculatedBaudRate);
+ SPI_DRV_MasterConfigureBus(SPI_UNIT, &spiConfig, &calculatedBaudRate);
debug_printf("EPD baud rate %u Hz\r\n", calculatedBaudRate);
+#ifdef BADGE_V2
+ /* Turn off BORDER_CONTROL */
+ GPIO_DRV_WritePinOutput(pinBorder.pinName, 1);
+
+ /* Reset */
+ GPIO_DRV_WritePinOutput(pinReset.pinName, 1);
+ EPD_Delay(5);
+ GPIO_DRV_WritePinOutput(pinReset.pinName, 0);
+ EPD_Delay(5);
+ GPIO_DRV_WritePinOutput(pinReset.pinName, 1);
+ EPD_Delay(5);
+#endif
+
/* read the COG ID */
uint8_t id = EPD_ReadCogID();
if ((id & 0x0f) != 0x02) {
@@ -265,11 +368,11 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
for (i = 0; i < 4; ++i) {
/* charge pump positive voltage on - VGH/VDL on */
EPD_WriteCommandByte(0x05, 0x01);
- EPD_Delay(240);
+ EPD_Delay(150);
/* charge pump negative voltage on - VGL/VDL on */
EPD_WriteCommandByte(0x05, 0x03);
- EPD_Delay(40);
+ EPD_Delay(90);
/* charge pump Vcom on - Vcom driver on */
EPD_WriteCommandByte(0x05, 0x0f);
@@ -287,7 +390,7 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
}
/* output enable to disable */
- EPD_WriteCommandByte(0x02, 0x40);
+ EPD_WriteCommandByte(0x02, 0x06);
/* Draw something */
/* TODO I'd like to call a callback at this point with a "graphics context"
@@ -298,10 +401,29 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
* pushing bits to the display.
*/
EPD_frame_repeat(old_image, 0xff, EPD_compensate);
- EPD_frame_repeat(old_image, 0xff, EPD_white);
- EPD_frame_repeat(new_image, 0xaa, EPD_inverse);
- EPD_frame_repeat(new_image, 0xaa, EPD_normal);
+ EPD_frame_repeat(old_image, 0xaa, EPD_white);
+ EPD_frame_repeat(new_image, 0, EPD_inverse);
+ EPD_frame_repeat(new_image, 0, EPD_normal);
+ /* Write a "nothing" frame */
+ EPD_frame(NULL, 0x00, EPD_normal);
+
+ /* Write a dummy line */
+ EPD_line(-1, NULL, 0x00, EPD_normal);
+ EPD_Delay(25);
+
+#ifdef BADGE_V2
+ /* Turn on BORDER_CONTROL */
+ GPIO_DRV_WritePinOutput(pinBorder.pinName, 0);
+ EPD_Delay(100);
+
+ /* Turn off BORDER_CONTROL */
+ GPIO_DRV_WritePinOutput(pinBorder.pinName, 1);
+#else
+ EPD_Delay(75);
+#endif
+
+out:
/* ??? */
EPD_WriteCommandByte(0x0b, 0x00);
@@ -313,7 +435,7 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
/* power off charge pump neg voltage */
EPD_WriteCommandByte(0x05, 0x01);
- EPD_Delay(120);
+ EPD_Delay(300);
/* discharge internal */
EPD_WriteCommandByte(0x04, 0x80);
@@ -325,13 +447,15 @@ int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image)
EPD_WriteCommandByte(0x07, 0x01);
EPD_Delay(50);
- /* discharge external */
- GPIO_DRV_WritePinOutput(pinDischarge.pinName, 1);
- EPD_Delay(150);
- GPIO_DRV_WritePinOutput(pinDischarge.pinName, 0);
+#ifdef BADGE_V2
+ /* Turn on BORDER_CONTROL */
+ GPIO_DRV_WritePinOutput(pinBorder.pinName, 0);
-out:
- SPI_DRV_MasterDeinit(1);
+ /* TODO should RESET go low to save power? */
+ GPIO_DRV_WritePinOutput(pinReset.pinName, 0);
+#endif
+
+ SPI_DRV_MasterDeinit(SPI_UNIT);
return rc;
}
diff --git a/laser-tag software/epaper.h b/laser-tag software/epaper.h
index 26e1815..138c67f 100644
--- a/laser-tag software/epaper.h
+++ b/laser-tag software/epaper.h
@@ -3,6 +3,14 @@
#include <stdint.h>
+#ifdef BADGE_V1
+#define EPD_W (232)
+#define EPD_H (128)
+#else
+#define EPD_W (264)
+#define EPD_H (176)
+#endif
+
void EPD_Init();
int EPD_Draw(const uint8_t *old_image, const uint8_t *new_image);
diff --git a/laser-tag software/flash.c b/laser-tag software/flash.c
index f8e8327..aa82363 100644
--- a/laser-tag software/flash.c
+++ b/laser-tag software/flash.c
@@ -35,48 +35,39 @@ int flash_init()
sizeof ram_fn,
(intptr_t)FlashCommandSequence);
- /* Our images are in the 2nd block and take up 4096 bytes */
+ /* Our images are in the 2nd block and take up 6k bytes */
int i;
for (i = 0; i < IMAGE_COUNT; ++i) {
images[i] = (uint8_t *)flash_config.PFlashBase
- + FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE + i * 4096;
+ + FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE + i * 1024 * 6;
}
return 0;
}
#define SECTOR_SIZE (FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE)
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-uint8_t RMW_buffer[SECTOR_SIZE];
-int flash_write(uint32_t addr, uint8_t *data, uint32_t len)
+int flash_write_sector(uint32_t addr, uint8_t *data)
{
- uint32_t sector;
- uint32_t end = addr + len;
-
- for (sector = addr / SECTOR_SIZE * SECTOR_SIZE;
- sector < end;
- data += SECTOR_SIZE - (addr - sector),
- len -= SECTOR_SIZE - (addr - sector),
- sector += SECTOR_SIZE,
- addr = sector) {
- uint32_t rc;
-
- memcpy(RMW_buffer, (void *)sector, SECTOR_SIZE);
- memcpy(&RMW_buffer[addr - sector],
- data,
- MIN(SECTOR_SIZE - (addr - sector), len));
- rc = FlashEraseSector(&flash_config, sector, SECTOR_SIZE,
- pFlashCommandSequence);
- if (FTFx_OK != rc) {
- debug_printf("Error erasing sector 0x%08x: %u\r\n", sector, rc);
- return -1;
- }
- rc = FlashProgram(&flash_config, sector, SECTOR_SIZE, RMW_buffer,
- pFlashCommandSequence);
- if (FTFx_OK != rc) {
- debug_printf("Error programming sector 0x%08x: %u\r\n", sector, rc);
- return -1;
- }
+ debug_printf("flash_write_sector to 0x%08x\r\n", addr);
+ if (addr % SECTOR_SIZE) {
+ debug_printf("bad addr\r\n");
+ return -1;
+ }
+ if (memcmp((void *)addr, data, SECTOR_SIZE) == 0) {
+ debug_printf("No change\r\n");
+ return 0;
+ }
+ uint32_t rc = FlashEraseSector(&flash_config, addr, SECTOR_SIZE,
+ pFlashCommandSequence);
+ if (FTFx_OK != rc) {
+ debug_printf("Error erasing sector 0x%08x: %u\r\n", addr, rc);
+ return -1;
+ }
+ rc = FlashProgram(&flash_config, addr, SECTOR_SIZE, data,
+ pFlashCommandSequence);
+ if (FTFx_OK != rc) {
+ debug_printf("Error programming sector 0x%08x: %u\r\n", addr, rc);
+ return -1;
}
return 0;
}
diff --git a/laser-tag software/flash.h b/laser-tag software/flash.h
index 8bf15db..20183b0 100644
--- a/laser-tag software/flash.h
+++ b/laser-tag software/flash.h
@@ -7,6 +7,6 @@
extern uint8_t *images[IMAGE_COUNT];
int flash_init();
-int flash_write(uint32_t addr, uint8_t *data, uint32_t len);
+int flash_write_sector(uint32_t addr, uint8_t *data);
#endif
diff --git a/laser-tag software/gdb.init b/laser-tag software/gdb.init
index b08fd2e..717819a 100644
--- a/laser-tag software/gdb.init
+++ b/laser-tag software/gdb.init
@@ -1,5 +1,5 @@
set arch arm
-target remote :3333
-def hook-stop
+target extended-remote :3333
+define hook-stop
x/i $pc
end
diff --git a/laser-tag software/lptmr.c b/laser-tag software/lptmr.c
new file mode 100644
index 0000000..8fa7ad9
--- /dev/null
+++ b/laser-tag software/lptmr.c
@@ -0,0 +1,45 @@
+#include "lptmr.h"
+
+static const lptmr_user_config_t g_lptmrConfig = {
+ .timerMode = kLptmrTimerModeTimeCounter,
+ .freeRunningEnable = false,
+ .prescalerEnable = false,
+ .prescalerClockSource = kClockLptmrSrcLpoClk,
+ .isInterruptEnabled = true,
+};
+
+static lptmr_state_t lptmrState;
+static lptmr_callback_t user_cb;
+static uint32_t total_ms;
+
+static void lptmr_call_back(void)
+{
+ total_ms += 100;
+ user_cb();
+}
+
+uint32_t get_ms() {
+ uint32_t us = LPTMR_DRV_GetCurrentTimeUs(LPTMR0_IDX);
+ return total_ms + us / 1000;
+}
+
+void delay_ms(uint32_t delay)
+{
+ uint32_t until = get_ms() + delay;
+ while(get_ms() < until);
+}
+
+void lptmr_init(lptmr_callback_t cb)
+{
+ LPTMR_DRV_Init(LPTMR0_IDX, &lptmrState, &g_lptmrConfig);
+ LPTMR_DRV_SetTimerPeriodUs(LPTMR0_IDX, 100000);
+ user_cb = cb;
+ total_ms = 0;
+ LPTMR_DRV_InstallCallback(LPTMR0_IDX, lptmr_call_back);
+}
+
+void lptmr_start()
+{
+ LPTMR_DRV_Start(LPTMR0_IDX);
+}
+/* vim: set expandtab ts=4 sw=4: */
diff --git a/laser-tag software/lptmr.h b/laser-tag software/lptmr.h
new file mode 100644
index 0000000..4d404b4
--- /dev/null
+++ b/laser-tag software/lptmr.h
@@ -0,0 +1,10 @@
+#ifndef _LPTMR_H_
+#define _LPTMR_H_
+#include "fsl_lptmr_driver.h"
+
+uint32_t get_ms();
+void delay_ms(uint32_t delay);
+void lptmr_init(lptmr_callback_t cb);
+void lptmr_start();
+#endif
+/* vim: set expandtab ts=4 sw=4: */
diff --git a/laser-tag software/main.c b/laser-tag software/main.c
index f91d541..982a7b8 100644
--- a/laser-tag software/main.c
+++ b/laser-tag software/main.c
@@ -32,6 +32,7 @@
#include "disk.h"
#include "epaper.h"
#include "flash.h"
+#include "lptmr.h"
#include "fsl_clock_manager.h"
#include "fsl_cmp_driver.h"
#include "fsl_dac_driver.h"
@@ -39,15 +40,20 @@
#include "fsl_dma_driver.h"
#include "fsl_flexio_driver.h"
#include "fsl_gpio_driver.h"
-#include "fsl_lptmr_driver.h"
#include "fsl_lpuart_driver.h"
#include "fsl_os_abstraction.h"
#include "fsl_pit_driver.h"
#include "fsl_smc_hal.h"
#include "fsl_tpm_driver.h"
-#include "radio.h"
-#include "text.h"
+#include "fsl_rcm_hal.h"
+#ifdef BADGE_V1
+#warning "Building for hardware v1"
+#else
+#warning "Building for hardware v2"
+#endif
+
+#define USE_HIRC 1
static int current_image = 0;
static volatile int cue_next_image = 0;
@@ -97,8 +103,14 @@ static const clock_manager_user_config_t g_defaultClockConfigRun = {
.simConfig =
{
.er32kSrc = kClockEr32kSrcOsc0, // ERCLK32K selection, use OSC.
- .outdiv1 = 0U,
- .outdiv4 = 1U,
+ /*
+ * 1-1 works
+ * 1-3 works
+ * 2-1 USB almost works
+ * 2-3 USB doesn't work
+ */
+ .outdiv1 = 1U, // 48MHz / 2 = 24MHz
+ .outdiv4 = 3U, // 24MHz / 4 = 6MHz
},
.oscerConfig =
{
@@ -110,7 +122,11 @@ static const clock_manager_user_config_t g_defaultClockConfigRun = {
/* Idle the CPU in Very Low Power Wait (VLPW) */
/* This should be the lowest power mode where the PIT still functions. */
static const smc_power_mode_config_t g_idlePowerMode = {
+#if USE_HIRC
+ .powerModeName = kPowerModeWait,
+#else
.powerModeName = kPowerModeVlpw,
+#endif
};
/* Switch GPIO pins */
@@ -191,16 +207,6 @@ static const gpio_input_pin_user_config_t g_switchSelect = {
.config.interrupt = kPortIntEitherEdge,
};
-/* LPTMR configurations */
-static const lptmr_user_config_t g_lptmrConfig = {
- .timerMode = kLptmrTimerModeTimeCounter,
- .freeRunningEnable = false,
- .prescalerEnable = true,
- .prescalerClockSource = kClockLptmrSrcLpoClk,
- .prescalerValue = kLptmrPrescalerDivide2,
- .isInterruptEnabled = true,
-};
-
/* PIT config */
static const pit_user_config_t g_pitChan0 = {
.periodUs = 193000,
@@ -233,9 +239,13 @@ static cmp_dac_config_t g_cmpDacConf = {
.dacValue = 32,
};
-/* LPUART0 config */
+/* Laser LPUART config */
static lpuart_user_config_t g_lpuartConfig = {
+#if USE_HIRC
.clockSource = kClockLpuartSrcIrc48M,
+#else
+ .clockSource = kClockLpuartSrcMcgIrClk,
+#endif
.baudRate = 9600,
.parityMode = kLpuartParityEven,
.stopBitCount = kLpuartOneStopBit,
@@ -246,10 +256,24 @@ static lpuart_user_config_t g_lpuartConfig = {
static flexio_user_config_t g_flexioConfig = {
.useInt = false,
.onDozeEnable = true,
- .onDebugEnable = false,
+ .onDebugEnable = true,
.fastAccessEnable = true,
};
+/*
+ * Run FLEXIO at 4MHz and clock out a bit every 0.25 us.
+ * We use 5 bits for each NZR symbol.
+ * For an NZR zero we clock out one 1 bit (0.25 us) and four 0 bits (1 us).
+ * For an NZR one we clock out four 1 bits (1 us) and one 0 bit (0.25 us).
+ * This is within the WS2812B spec for "short" time of 0.2 to 0.5 us and
+ * "long" time of 0.75 to 1.05 us.
+ */
+#if USE_HIRC
+static const int flexio_clk_div = 12;
+#else
+static const int flexio_clk_div = 2;
+#endif
+
static flexio_timer_config_t g_timerConfig = {
.trgsel = FLEXIO_HAL_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.trgpol = kFlexioTimerTriggerPolarityActiveLow,
@@ -263,7 +287,7 @@ static flexio_timer_config_t g_timerConfig = {
.timena = kFlexioTimerEnableOnTriggerHigh,
.tstop = kFlexioTimerStopBitDisabled,
.tstart = kFlexioTimerStartBitDisabled,
- .timcmp = (32 * 2 - 1) << 8 | (10 - 1), // 32 bits at 2.4 MHz
+ .timcmp = (30 * 2 - 1) << 8 | (flexio_clk_div / 2 - 1), // 30 bits at 4 Mbps
};
static flexio_shifter_config_t g_shifterConfig = {
@@ -278,9 +302,11 @@ static flexio_shifter_config_t g_shifterConfig = {
};
#ifdef BADGE_V1
-static const g_buzzer_tpm_ch = 3;
+static const int g_buzzer_tpm_ch = 3;
+static const int g_laser_LPUART_UNIT = 1;
#else
-static const g_buzzer_tmp_ch = 1;
+static const int g_buzzer_tpm_ch = 1;
+static const int g_laser_LPUART_UNIT = 0;
#endif
@@ -294,42 +320,66 @@ static uint8_t rxBuff[1];
static uint8_t txBuff[] = { 'R' };
static uint8_t laser_on;
static uint8_t seizure_on = 1;
-static uint32_t shift0_buf[3];
+static uint32_t shift0_buf[4];
static uint32_t blank_led;
-static uint8_t image0[232 * 128 / 8];
-static uint8_t image1[232 * 128 / 8];
+static uint8_t image0[EPD_W * EPD_H / 8];
+static uint8_t image1[EPD_W * EPD_H / 8];
-void read_sun_raster(uint8_t *in, uint8_t *out)
+int read_sun_raster(uint8_t *in, uint8_t *out)
{
- int x, y;
- int stride = (232 + 15) / 16 * 16;
-
- in += 32; /* skip header, don't even check it */
- for (y = 0; y < 128; ++y) {
- for (x = 0; x < 232; x += 8) {
+ struct {
+ uint32_t magic;
+ uint32_t width;
+ uint32_t height;
+ uint32_t depth;
+ } *hdr = (void *)in;
+ if (hdr->magic != __builtin_bswap32(0x59a66a95))
+ return -1;
+ if (hdr->depth != __builtin_bswap32(1))
+ return -2;
+ uint32_t w = __builtin_bswap32(hdr->width);
+ uint32_t stride = (w + 15) / 16 * 16;
+ if (w > EPD_W)
+ w = EPD_W;
+ uint32_t h = __builtin_bswap32(hdr->height);
+ if (h > EPD_H)
+ h = EPD_H;
+ in += 32; /* skip header */
+ for (uint32_t y = 0; y < h; ++y) {
+ for (uint32_t x = 0; x < w; x += 8) {
uint8_t v = in[(y * stride + x) / 8];
v = ((v >> 1) & 0x55) | ((v & 0x55) << 1);
v = ((v >> 2) & 0x33) | ((v & 0x33) << 2);
v = ((v >> 4) & 0x0F) | ((v & 0x0F) << 4);
- out[(y * 232 + x) / 8] = v;
+ out[(y * w + x) / 8] = v;
}
}
+ return 0;
}
void led(uint8_t red, uint8_t green, uint8_t blue)
{
- FLEXIO_Type *fiobase = g_flexioBase[0];
- uint32_t color = (green << 16) | (red << 8) | blue;
+ uint32_t color = ((uint32_t)green << 16) | ((uint32_t)red << 8) | blue;
int i;
for (i = 0; i < 24; ++i) {
- shift0_buf[i / 10] <<= 3;
- shift0_buf[i / 10] |= 4 | ((color >> (22 - i)) & 2);
+ shift0_buf[i / 6] <<= 5;
+ if ((color >> (23 - i)) & 1)
+ shift0_buf[i / 6] |= 0x1e;
+ else
+ shift0_buf[i / 6] |= 0x10;
}
- shift0_buf[2] <<= 3 * 6;
-
- DMA_DRV_ConfigTransfer(&g_fioChan, kDmaMemoryToPeripheral, 4,
+ // the high 30 bits of each "word" are clocked out
+ shift0_buf[0] <<= 2;
+ shift0_buf[1] <<= 2;
+ shift0_buf[2] <<= 2;
+ shift0_buf[3] <<= 2;
+
+ DMA_DRV_ConfigTransfer(&g_fioChan,
+ kDmaMemoryToPeripheral,
+ sizeof(shift0_buf[0]),
(intptr_t)&shift0_buf,
- (intptr_t)&FLEXIO_SHIFTBUFBIS_REG(fiobase, 0), sizeof(shift0_buf));
+ (intptr_t)&FLEXIO_SHIFTBUFBIS_REG(FLEXIO, 0),
+ sizeof(shift0_buf));
DMA_DRV_StartChannel(&g_fioChan);
}
@@ -359,15 +409,15 @@ static void lptmr_call_back(void)
txBuff[0] = colors[foo];
foo = (foo + 1) % 3;
}
- LPUART_DRV_SendData(1, txBuff, laser_pulse_length);
+ LPUART_DRV_SendData(g_laser_LPUART_UNIT, txBuff, laser_pulse_length);
}
/* countdown to turn off LED */
if (blank_led) {
- if (blank_led == 1) {
+ --blank_led;
+ if (blank_led == 0) {
led(0, 0, 0);
}
- blank_led--;
}
}
@@ -425,59 +475,55 @@ void PIT_IRQHandler(void)
}
}
-static void GPIO_transition_handler(const int port)
+static void GPIO_transition_handler()
{
- if (GPIO_EXTRACT_PORT(g_switch1.pinName) == port) {
- if (GPIO_DRV_ReadPinInput(g_switch1.pinName)) {
- TPM_DRV_PwmStop(0, &param, g_buzzer_tpm_ch);
- PIT_DRV_StopTimer(0, 0);
- } else {
- position = 0;
- PIT_DRV_StartTimer(0, 0);
- }
+#ifdef DEBUG
+ debug_printf("Switches: %c%c%c%c%c%c%c\r\n",
+ GPIO_DRV_ReadPinInput(g_switch1.pinName) ? ' ' : '1',
+ GPIO_DRV_ReadPinInput(g_switch2.pinName) ? ' ' : '2',
+ GPIO_DRV_ReadPinInput(g_switchUp.pinName) ? ' ' : 'U',
+ GPIO_DRV_ReadPinInput(g_switchDown.pinName) ? ' ' : 'D',
+ GPIO_DRV_ReadPinInput(g_switchLeft.pinName) ? ' ' : 'L',
+ GPIO_DRV_ReadPinInput(g_switchRight.pinName) ? ' ' : 'R',
+ GPIO_DRV_ReadPinInput(g_switchSelect.pinName) ? ' ' : 'S');
+#endif
+ if (GPIO_DRV_ReadPinInput(g_switch1.pinName)) {
+ TPM_DRV_PwmStop(0, &param, g_buzzer_tpm_ch);
+ PIT_DRV_StopTimer(0, 0);
+ } else {
+ position = 0;
+ PIT_DRV_StartTimer(0, 0);
}
- if (GPIO_EXTRACT_PORT(g_switch2.pinName) == port) {
- if (GPIO_DRV_ReadPinInput(g_switch2.pinName)) {
- LPUART_DRV_AbortSendingData(1);
- laser_on = 0;
- } else {
- laser_on = 1;
- }
+ if (GPIO_DRV_ReadPinInput(g_switch2.pinName)) {
+ LPUART_DRV_AbortSendingData(g_laser_LPUART_UNIT);
+ laser_on = 0;
+ } else {
+ laser_on = 1;
}
- if (GPIO_EXTRACT_PORT(g_switchUp.pinName) == port) {
- if (!GPIO_DRV_ReadPinInput(g_switchUp.pinName)) {
- txBuff[0] = 'R';
- seizure_on = 0;
- }
+ if (!GPIO_DRV_ReadPinInput(g_switchUp.pinName)) {
+ txBuff[0] = 'R';
+ seizure_on = 0;
}
- if (GPIO_EXTRACT_PORT(g_switchLeft.pinName) == port) {
- if (!GPIO_DRV_ReadPinInput(g_switchLeft.pinName)) {
- txBuff[0] = 'G';
- seizure_on = 0;
- }
+ if (!GPIO_DRV_ReadPinInput(g_switchLeft.pinName)) {
+ txBuff[0] = 'G';
+ seizure_on = 0;
}
- if (GPIO_EXTRACT_PORT(g_switchRight.pinName) == port) {
- if (!GPIO_DRV_ReadPinInput(g_switchRight.pinName)) {
- txBuff[0] = 'B';
- seizure_on = 0;
- }
+ if (!GPIO_DRV_ReadPinInput(g_switchRight.pinName)) {
+ txBuff[0] = 'B';
+ seizure_on = 0;
}
- if (GPIO_EXTRACT_PORT(g_switchDown.pinName) == port) {
- if (!GPIO_DRV_ReadPinInput(g_switchDown.pinName)) {
- txBuff[0] = 'T';
- seizure_on = 0;
- }
+ if (!GPIO_DRV_ReadPinInput(g_switchDown.pinName)) {
+ txBuff[0] = 'T';
+ seizure_on = 0;
}
- if (GPIO_EXTRACT_PORT(g_switchSelect.pinName) == port) {
- if (!GPIO_DRV_ReadPinInput(g_switchSelect.pinName)) {
- cue_next_image = 1;
- }
+ if (!GPIO_DRV_ReadPinInput(g_switchSelect.pinName)) {
+ cue_next_image = 1;
}
}
@@ -486,15 +532,16 @@ void PORTA_IRQHandler(void)
/* Clear interrupt flag.*/
PORT_HAL_ClearPortIntFlag(PORTA_BASE_PTR);
- GPIO_transition_handler(GPIOA_IDX);
+ GPIO_transition_handler();
}
-void PORTC_IRQHandler(void)
+void PORTCD_IRQHandler(void)
{
/* Clear interrupt flag.*/
PORT_HAL_ClearPortIntFlag(PORTC_BASE_PTR);
+ PORT_HAL_ClearPortIntFlag(PORTD_BASE_PTR);
- GPIO_transition_handler(GPIOC_IDX);
+ GPIO_transition_handler();
}
static void lpuartTxCallback(uint32_t instance, void *state)
@@ -515,16 +562,22 @@ static void lpuartRxCallback(uint32_t instance, void *lpuartState)
LPUART_WR_STAT(base, (stat & 0x3e000000) |
LPUART_STAT_NF_MASK | LPUART_STAT_FE_MASK | LPUART_STAT_PF_MASK);
if (rxBuff[0] == 'R') {
+ seizure_on = 0;
+ txBuff[0] = rxBuff[0];
led(0xff, 0x00, 0x00);
blank_led = 30;
return;
}
if (rxBuff[0] == 'G') {
+ seizure_on = 0;
+ txBuff[0] = rxBuff[0];
led(0x00, 0xff, 0x00);
blank_led = 30;
return;
}
if (rxBuff[0] == 'B') {
+ seizure_on = 0;
+ txBuff[0] = rxBuff[0];
led(0x00, 0x00, 0xff);
blank_led = 30;
return;
@@ -555,12 +608,19 @@ static void fioDmaCallback(void *param, dma_channel_status_t status)
DMA_DRV_StopChannel(&g_fioChan);
}
+void HardFault_Handler(void)
+{
+ //debug_printf("Hard Fault!\r\n");
+ for(;;);
+}
+
/*!
* @brief Main function
*/
int main (void)
{
/* enable clock for PORTs */
+ // XXX GPIO_DRV_InputPinInit() already does this!
CLOCK_SYS_EnablePortClock(PORTA_IDX);
CLOCK_SYS_EnablePortClock(PORTC_IDX);
CLOCK_SYS_EnablePortClock(PORTD_IDX);
@@ -573,27 +633,32 @@ int main (void)
SMC_HAL_SetProtection(SMC, kAllowPowerModeAll);
/* Set system clock configuration. */
+#if USE_HIRC
CLOCK_SYS_SetConfiguration(&g_defaultClockConfigRun);
+#else
+ CLOCK_SYS_SetConfiguration(&g_defaultClockConfigVlpr);
+#endif
- /* Break everything */
- OSA_Init();
-
- /* Setup Debug console on LPUART0 on PTB17 */
+ /* Setup Debug console */
#ifdef BADGE_V1
PORT_HAL_SetMuxMode(PORTB, 17, kPortMuxAlt3);
+#if USE_HIRC
CLOCK_SYS_SetLpuartSrc(0, kClockLpuartSrcIrc48M);
+#else
+ CLOCK_SYS_SetLpuartSrc(0, kClockLpuartSrcMcgIrClk);
+#endif
DbgConsole_Init(0, 9600, kDebugConsoleLPUART);
#else
PORT_HAL_SetMuxMode(PORTD, 5, kPortMuxAlt3);
- CLOCK_SYS_SetLpuartSrc(0, kClockLpuartSrcIrc48M);
DbgConsole_Init(2, 9600, kDebugConsoleUART);
#endif
+#ifdef DEBUG
+ debug_printf("Debug console initialized\r\n");
+ debug_printf("Reset src = 0x%x\r\n", RCM_HAL_GetSrcStatus(RCM, kRcmSrcAll));
+#endif
/* Initialize LPTMR */
- lptmr_state_t lptmrState;
- LPTMR_DRV_Init(LPTMR0_IDX, &lptmrState, &g_lptmrConfig);
- LPTMR_DRV_SetTimerPeriodUs(LPTMR0_IDX, 100000);
- LPTMR_DRV_InstallCallback(LPTMR0_IDX, lptmr_call_back);
+ lptmr_init(lptmr_call_back);
/* Initialize DMA */
dma_state_t dma_state;
@@ -606,7 +671,6 @@ int main (void)
/* Initialize CMP */
CMP_DRV_Init(0, &g_cmpState, &g_cmpConf);
CMP_DRV_ConfigDacChn(0, &g_cmpDacConf);
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 0, kPortMuxAlt5);
CMP_DRV_Start(0);
/* Buttons */
@@ -619,48 +683,46 @@ int main (void)
GPIO_DRV_InputPinInit(&g_switchSelect);
/* Start LPTMR */
- LPTMR_DRV_Start(LPTMR0_IDX);
-
- /* Setup LPUART1 */
+ lptmr_start();
+
+ /* Setup Laser UART */
+ LPUART_DRV_Init(g_laser_LPUART_UNIT, &g_lpuartState, &g_lpuartConfig);
+ LPUART_DRV_InstallRxCallback(g_laser_LPUART_UNIT, lpuartRxCallback, rxBuff, NULL, true);
+ LPUART_DRV_InstallTxCallback(g_laser_LPUART_UNIT, lpuartTxCallback, NULL, NULL);
+ LPUART_BWR_CTRL_TXINV(g_lpuartBase[g_laser_LPUART_UNIT], 1);
+ SIM_HAL_SetLpuartRxSrcMode(SIM, g_laser_LPUART_UNIT, kSimLpuartRxsrcCmp0);
#ifdef BADGE_V1
- LPUART_DRV_Init(1, &g_lpuartState, &g_lpuartConfig);
- LPUART_DRV_InstallRxCallback(1, lpuartRxCallback, rxBuff, NULL, true);
- LPUART_DRV_InstallTxCallback(1, lpuartTxCallback, NULL, NULL);
- LPUART_BWR_CTRL_TXINV(g_lpuartBase[1], 1);
- PORT_HAL_SetMuxMode(g_portBase[GPIOE_IDX], 0, kPortMuxAlt3);
- PORT_HAL_SetMuxMode(g_portBase[GPIOE_IDX], 1, kPortMuxAlt3);
+ PORT_HAL_SetMuxMode(PORTE, 0, kPortMuxAlt3);
#else
- LPUART_DRV_Init(0, &g_lpuartState, &g_lpuartConfig);
- LPUART_DRV_InstallRxCallback(0, lpuartRxCallback, rxBuff, NULL, true);
- LPUART_DRV_InstallTxCallback(0, lpuartTxCallback, NULL, NULL);
- LPUART_BWR_CTRL_TXINV(g_lpuartBase[0], 1);
- PORT_HAL_SetMuxMode(g_portBase[GPIOA_IDX], 1, kPortMuxAlt2);
- PORT_HAL_SetMuxMode(g_portBase[GPIOA_IDX], 2, kPortMuxAlt2);
+ PORT_HAL_SetMuxMode(PORTA, 2, kPortMuxAlt2);
#endif
/* Setup FlexIO for the WS2812B */
- FLEXIO_Type *fiobase = g_flexioBase[0];
+#if USE_HIRC
CLOCK_SYS_SetFlexioSrc(0, kClockFlexioSrcIrc48M);
+#else
+ CLOCK_SYS_SetFlexioSrc(0, kClockFlexioSrcMcgIrClk);
+#endif
FLEXIO_DRV_Init(0, &g_flexioConfig);
- FLEXIO_HAL_ConfigureTimer(fiobase, 0, &g_timerConfig);
- FLEXIO_HAL_ConfigureShifter(fiobase, 0, &g_shifterConfig);
+ FLEXIO_HAL_ConfigureTimer(FLEXIO, 0, &g_timerConfig);
+ FLEXIO_HAL_ConfigureShifter(FLEXIO, 0, &g_shifterConfig);
#ifdef BADGE_V1
- PORT_HAL_SetMuxMode(g_portBase[GPIOE_IDX], 20, kPortMuxAlt6);
+ PORT_HAL_SetMuxMode(PORTE, 20, kPortMuxAlt6);
#else
- PORT_HAL_SetMuxMode(g_portBase[GPIOD_IDX], 4, kPortMuxAlt6);
+ PORT_HAL_SetMuxMode(PORTD, 4, kPortMuxAlt6);
#endif
FLEXIO_DRV_Start(0);
- FLEXIO_HAL_SetShifterStatusDmaCmd(fiobase, 1, true);
+ FLEXIO_HAL_SetShifterStatusDmaCmd(FLEXIO, 1, true);
DMA_DRV_RequestChannel(kDmaAnyChannel, kDmaRequestMux0FlexIOChannel0,
&g_fioChan);
DMA_DRV_RegisterCallback(&g_fioChan, fioDmaCallback, NULL);
/* Config buzzer on TPM0 */
#ifdef BADGE_V1
- PORT_HAL_SetMuxMode(g_portBase[GPIOE_IDX], 30, kPortMuxAlt3);
+ PORT_HAL_SetMuxMode(PORTE, 30, kPortMuxAlt3);
#else
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 2, kPortMuxAlt4);
+ PORT_HAL_SetMuxMode(PORTC, 2, kPortMuxAlt4);
#endif
tpm_general_config_t tmpConfig = {
.isDBGMode = false,
@@ -671,7 +733,11 @@ int main (void)
.triggerSource = kTpmTrigSel0,
};
TPM_DRV_Init(0, &tmpConfig);
+#if USE_HIRC
TPM_DRV_SetClock(0, kTpmClockSourceModuleHighFreq, kTpmDividedBy8);
+#else
+ TPM_DRV_SetClock(0, kTpmClockSourceModuleMCGIRCLK, kTpmDividedBy1);
+#endif
/* Blank LED just in case, saves power */
led(0x00, 0x00, 0x00);
@@ -683,9 +749,12 @@ int main (void)
EPD_Init();
/* Throw up first image */
- read_sun_raster(images[current_image], image0);
- int ret = EPD_Draw(NULL, image0);
- debug_printf("EPD_Draw returned %d\r\n", ret);
+ int ret = read_sun_raster(images[current_image], image0);
+ debug_printf("read_sun_raster returned %d\r\n", ret);
+ if (0 == ret) {
+ ret = EPD_Draw(NULL, image0);
+ debug_printf("EPD_Draw returned %d\r\n", ret);
+ }
if (-1 == ret) {
led(0xff, 0x00, 0x00);
} else if (-2 == ret) {
@@ -697,29 +766,31 @@ int main (void)
}
blank_led = 30;
-#if 0
- ret = radio_init();
- debug_printf("radio_init returned %d\r\n", ret);
- if (0 == ret) {
- led(0x22, 0x00, 0x22);
- }
-#endif
-
+#if USE_HIRC
/* No good can come of this */
disk_init();
+#endif
/* We're done, everything else is triggered through interrupts */
for(;;) {
if (cue_next_image) {
- int old_image = current_image;
- current_image = (current_image + 1) % IMAGE_COUNT;
- debug_printf("drawing %d -> %d\r\n", old_image, current_image);
- read_sun_raster(images[old_image], image0);
- read_sun_raster(images[current_image], image1);
- EPD_Draw(image0, image1);
cue_next_image = 0;
+ int old_image = current_image;
+ ret = read_sun_raster(images[old_image], image0);
+ if (0 == ret) {
+ do {
+ current_image = (current_image + 1) % IMAGE_COUNT;
+ ret = read_sun_raster(images[current_image], image1);
+ } while (ret != 0 && current_image != old_image);
+ debug_printf("drawing %d -> %d\r\n", old_image, current_image);
+ EPD_Draw(image0, image1);
+ }
}
-#ifndef DEBUG
+#if !USE_HIRC
+ SMC_HAL_SetMode(SMC, &g_idlePowerMode);
+#else
+ /* This doesn't seem to save any power in HIRC and instead messes up
+ * FLEXIO */
//SMC_HAL_SetMode(SMC, &g_idlePowerMode);
#endif
}
diff --git a/laser-tag software/radio.c b/laser-tag software/radio.c
deleted file mode 100644
index c78ec76..0000000
--- a/laser-tag software/radio.c
+++ /dev/null
@@ -1,207 +0,0 @@
-#include "radio.h"
-#include "fsl_debug_console.h"
-#include "fsl_gpio_driver.h"
-#include "fsl_spi_master_driver.h"
-#include "RFM69registers.h"
-
-static const gpio_output_pin_user_config_t pinReset = {
- .pinName = GPIO_MAKE_PIN(GPIOC_IDX, 8),
- .config.outputLogic = 1,
-};
-
-static const gpio_input_pin_user_config_t pinDIO0 = {
- .pinName = GPIO_MAKE_PIN(GPIOC_IDX, 9),
-};
-
-static const gpio_output_pin_user_config_t pinDIO2 = {
- .pinName = GPIO_MAKE_PIN(GPIOC_IDX, 10),
- .config.outputLogic = 0,
-};
-
-static const spi_master_user_config_t spiConfig = {
- .bitsPerSec = 10000000, /* max is 10 MHz */
- .polarity = kSpiClockPolarity_ActiveHigh,
- .phase = kSpiClockPhase_FirstEdge,
- .direction = kSpiMsbFirst,
- .bitCount = kSpi16BitMode,
-};
-
-static const struct {
- uint8_t reg;
- uint8_t val;
-} config[] = {
- { REG_OPMODE, RF_OPMODE_SEQUENCER_ON
- | RF_OPMODE_LISTEN_OFF
- | RF_OPMODE_STANDBY },
- { REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET
- | RF_DATAMODUL_MODULATIONTYPE_FSK
- | RF_DATAMODUL_MODULATIONSHAPING_00 }, // no shaping
- { REG_BITRATEMSB, RF_BITRATEMSB_55555 }, // 55,555 bps
- { REG_BITRATELSB, RF_BITRATELSB_55555 },
- { REG_FDEVMSB, RF_FDEVMSB_50000 }, // default: 5KHz,
- { REG_FDEVLSB, RF_FDEVLSB_50000 }, // (FDEV + BitRate / 2 <= 500KHz)
- { REG_FRFMSB, RF_FRFMSB_915 },
- { REG_FRFMID, RF_FRFMID_915 },
- { REG_FRFLSB, RF_FRFLSB_915 },
- // looks like PA1 and PA2 are not implemented on RFM69W,
- // hence the max output power is 13dBm
- // +17dBm and +20dBm are possible on RFM69HW
- // +13dBm formula: Pout = -18 + OutputPower (with PA0 or PA1**)
- // +17dBm formula: Pout = -14 + OutputPower (with PA1 and PA2)**
- // +20dBm formula: Pout = -11 + OutputPower (with PA1 and PA2)** and high
- // power PA settings (section 3.3.7 in datasheet)
- { REG_PALEVEL, RF_PALEVEL_PA0_OFF
- | RF_PALEVEL_PA1_ON
- | RF_PALEVEL_PA2_ON
- | RF_PALEVEL_OUTPUTPOWER_11111 },
- { REG_TESTPA1, 0x5D },
- { REG_TESTPA2, 0x7C },
- { REG_OCP, RF_OCP_OFF }, // over current protection
- // RXBW defaults are RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_5
- // (RxBw: 10.4KHz)
- //for BR-19200: RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 | RF_RXBW_EXP_3
- // (BitRate < 2 * RxBw)
- { REG_RXBW, RF_RXBW_DCCFREQ_010
- | RF_RXBW_MANT_16
- | RF_RXBW_EXP_2 },
- // DIO0 is the only IRQ we're using
- { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 },
- // DIO5 ClkOut disable for power saving
- { REG_DIOMAPPING2, RF_DIOMAPPING2_CLKOUT_OFF },
- // writing to this bit ensures that the FIFO & status flags are reset
- { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN },
- // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm
- { REG_RSSITHRESH, 220 },
- // default 3 preamble bytes 0xAAAAAA
- //{ REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE }
- { REG_SYNCCONFIG, RF_SYNC_ON
- | RF_SYNC_FIFOFILL_AUTO
- | RF_SYNC_SIZE_2
- | RF_SYNC_TOL_0 },
- // attempt to make this compatible with sync1 byte of RFM12B lib
- { REG_SYNCVALUE1, 0x2D },
- { REG_SYNCVALUE2, 0x01 }, // NETWORK ID (1 = users, 2 = uber)
- { REG_PACKETCONFIG1, RF_PACKET1_FORMAT_VARIABLE
- | RF_PACKET1_DCFREE_OFF
- | RF_PACKET1_CRC_ON
- | RF_PACKET1_CRCAUTOCLEAR_ON
- | RF_PACKET1_ADRSFILTERING_OFF },
- // in variable length mode: the max frame size, not used in TX
- { REG_PAYLOADLENGTH, 66 },
- // turned off because we're not using address filtering
- //{ REG_NODEADRS, nodeID },
- { REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY
- | RF_FIFOTHRESH_VALUE }, // TX on FIFO not empty
- // RXRESTARTDELAY must match transmitter PA ramp-down time
- // (bitrate dependent)
- //for BR-19200: RF_PACKET2_RXRESTARTDELAY_NONE | RF_PACKET2_AUTORXRESTART_ON
- //| RF_PACKET2_AES_OFF
- { REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_2BITS
- | RF_PACKET2_AUTORXRESTART_ON
- | RF_PACKET2_AES_OFF },
- // run DAGC continuously in RX mode for Fading Margin Improvement,
- // recommended default for AfcLowBetaOn=0
- { REG_TESTDAGC, RF_DAGC_IMPROVED_LOWBETA0 },
-};
-
-static spi_master_state_t spiState;
-
-static void delay(uint32_t ms)
-{
- for (; ms > 0; --ms) {
- /* XXX This is really stupid */
- volatile int i;
- for (i = 0; i < 306 * 12; ++i);
- }
-}
-
-static spi_status_t SPI_Transfer(const uint8_t *tx, uint8_t *rx, size_t count)
-{
- spi_status_t rc;
-
- rc = SPI_DRV_MasterTransfer(0, NULL, tx, rx, count);
- if (rc != kStatus_SPI_Success) {
- return rc;
- }
- int i, timeout = count * 2;
- for (i = 0; i < timeout; ++i) {
- rc = SPI_DRV_MasterGetTransferStatus(0, NULL);
- if (rc == kStatus_SPI_Success) {
- return rc;
- }
- }
- return rc;
-}
-
-static uint8_t read_reg(uint8_t reg)
-{
- uint8_t tx[2] = { 0, reg & 0x7f };
- uint8_t rx[2] = { 0, 0 };
-
- SPI_Transfer(tx, rx, 2);
- return rx[0];
-}
-
-static void write_reg(uint8_t reg, uint8_t val)
-{
- uint8_t tx[2] = { val, reg | 0x80 };
-
- SPI_Transfer(tx, NULL, 2);
-}
-
-int radio_init()
-{
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 4, kPortMuxAlt2);
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 5, kPortMuxAlt2);
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 6, kPortMuxAlt2);
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 7, kPortMuxAlt2);
- PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 8, kPortMuxAsGpio);
- //PORT_HAL_SetMuxMode(g_portBase[GPIOC_IDX], 10, kPortMuxAsGpio);
- GPIO_DRV_OutputPinInit(&pinReset);
- //GPIO_DRV_OutputPinInit(&pinDIO2);
- delay(1);
- GPIO_DRV_WritePinOutput(pinReset.pinName, 0);
- delay(5);
-
- /* Configure SPI0 */
- SPI_DRV_MasterInit(0, &spiState);
- uint32_t calculatedBaudRate;
- SPI_DRV_MasterConfigureBus(0, &spiConfig, &calculatedBaudRate);
- debug_printf("radio baud rate %u Hz\r\n", calculatedBaudRate);
-
- /* Use REG_SYNCVALUE1 to test that the radio is there */
- write_reg(REG_SYNCVALUE1, 0x55);
- uint8_t reg = read_reg(REG_SYNCVALUE1);
- if (reg != 0x55) {
- return -1;
- }
-
- /* Setup a bunch of config registers */
- uint32_t i;
- for (i = 0; i < sizeof config / sizeof *config; ++i) {
- write_reg(config[i].reg, config[i].val);
- }
- return 0;
-}
-
-void set_mode(uint8_t mode)
-{
- uint8_t reg = read_reg(REG_OPMODE);
-
- write_reg(REG_OPMODE, (reg & 0xE3) | mode);
-}
-
-void radio_test(void)
-{
- //write_reg(REG_DATAMODUL, RF_DATAMODUL_DATAMODE_CONTINUOUSNOBSYNC);
- set_mode(RF_OPMODE_TRANSMITTER);
- /*
- bool a = false;
- while (true) {
- GPIO_DRV_WritePinOutput(pinDIO2.pinName, a);
- a = !a;
- delay(100);
- }*/
-}
-
-/* vim: set expandtab ts=4 sw=4: */
diff --git a/laser-tag software/radio.h b/laser-tag software/radio.h
deleted file mode 100644
index 3f999a0..0000000
--- a/laser-tag software/radio.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _RADIO_H_
-#define _RADIO_H_
-
-int radio_init();
-void radio_test();
-
-#endif
diff --git a/laser-tag software/threatbutt_v2.im1 b/laser-tag software/threatbutt_v2.im1
new file mode 100644
index 0000000..0bb50ad
--- /dev/null
+++ b/laser-tag software/threatbutt_v2.im1
Binary files differ
diff --git a/laser-tag software/usb_descriptor.c b/laser-tag software/usb_descriptor.c
index 283bcb6..0ecbdea 100644
--- a/laser-tag software/usb_descriptor.c
+++ b/laser-tag software/usb_descriptor.c
@@ -782,11 +782,11 @@ uint8_t USB_Desc_Set_Speed
usb_desc_request_notify_struct_t desc_callback =
{
- USB_Desc_Get_Descriptor,
- USB_Desc_Get_Interface,
- USB_Desc_Set_Interface,
- USB_Set_Configuration,
- USB_Desc_Get_Entity
+ .get_desc = USB_Desc_Get_Descriptor,
+ .get_desc_interface = USB_Desc_Get_Interface,
+ .set_desc_interface = USB_Desc_Set_Interface,
+ .set_configuration = USB_Set_Configuration,
+ .get_desc_entity = USB_Desc_Get_Entity,
};
/* vim: set expandtab ts=4 sw=4: */
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-12-24 18:58:17 +0000